Soby Mathew | 7b75418 | 2016-07-11 14:15:27 +0100 | [diff] [blame] | 1 | /* |
Soby Mathew | 7d5a2e7 | 2018-01-10 15:59:31 +0000 | [diff] [blame] | 2 | * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. |
Soby Mathew | 7b75418 | 2016-07-11 14:15:27 +0100 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Soby Mathew | 7b75418 | 2016-07-11 14:15:27 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
Antonio Nino Diaz | bd7b740 | 2019-01-25 14:30:04 +0000 | [diff] [blame] | 7 | #include <plat/arm/common/plat_arm.h> |
| 8 | |
Soby Mathew | 7b75418 | 2016-07-11 14:15:27 +0100 | [diff] [blame] | 9 | #include "../fvp_private.h" |
| 10 | |
Soby Mathew | 6d07e67 | 2018-03-01 10:53:33 +0000 | [diff] [blame] | 11 | void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1, |
Soby Mathew | 7d5a2e7 | 2018-01-10 15:59:31 +0000 | [diff] [blame] | 12 | u_register_t arg2, u_register_t arg3) |
Soby Mathew | 7b75418 | 2016-07-11 14:15:27 +0100 | [diff] [blame] | 13 | { |
Soby Mathew | 7d5a2e7 | 2018-01-10 15:59:31 +0000 | [diff] [blame] | 14 | arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); |
Soby Mathew | 7b75418 | 2016-07-11 14:15:27 +0100 | [diff] [blame] | 15 | |
| 16 | /* Initialize the platform config for future decision making */ |
| 17 | fvp_config_setup(); |
| 18 | |
| 19 | /* |
| 20 | * Initialize the correct interconnect for this cluster during cold |
| 21 | * boot. No need for locks as no other CPU is active. |
| 22 | */ |
| 23 | fvp_interconnect_init(); |
| 24 | |
| 25 | /* |
| 26 | * Enable coherency in interconnect for the primary CPU's cluster. |
| 27 | * Earlier bootloader stages might already do this (e.g. Trusted |
| 28 | * Firmware's BL1 does it) but we can't assume so. There is no harm in |
| 29 | * executing this code twice anyway. |
| 30 | * FVP PSCI code will enable coherency for other clusters. |
| 31 | */ |
| 32 | fvp_interconnect_enable(); |
| 33 | } |