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Antonio Nino Diazae6779e2017-11-06 14:49:04 +00001/*
Antonio Nino Diaz1f470022018-03-27 09:39:47 +01002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Antonio Nino Diazae6779e2017-11-06 14:49:04 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <assert.h>
8#include <bl_common.h>
Antonio Nino Diazf96582a2018-10-19 00:57:16 +01009#include <libfdt.h>
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000010#include <platform.h>
11#include <platform_def.h>
12#include <xlat_mmu_helpers.h>
13#include <xlat_tables_defs.h>
14
15#include "rpi3_private.h"
16
17#define BL31_END (uintptr_t)(&__BL31_END__)
18
19/*
20 * Placeholder variables for copying the arguments that have been passed to
21 * BL31 from BL2.
22 */
23static entry_point_info_t bl32_image_ep_info;
24static entry_point_info_t bl33_image_ep_info;
25
26/*******************************************************************************
27 * Return a pointer to the 'entry_point_info' structure of the next image for
28 * the security state specified. BL33 corresponds to the non-secure image type
29 * while BL32 corresponds to the secure image type. A NULL pointer is returned
30 * if the image does not exist.
31 ******************************************************************************/
32entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
33{
34 entry_point_info_t *next_image_info;
35
36 assert(sec_state_is_valid(type) != 0);
37
38 next_image_info = (type == NON_SECURE)
39 ? &bl33_image_ep_info : &bl32_image_ep_info;
40
41 /* None of the images can have 0x0 as the entrypoint. */
42 if (next_image_info->pc) {
43 return next_image_info;
44 } else {
45 return NULL;
46 }
47}
48
49/*******************************************************************************
50 * Perform any BL31 early platform setup. Here is an opportunity to copy
John Tsichritzisd653d332018-09-14 10:34:57 +010051 * parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000052 * they are lost (potentially). This needs to be done before the MMU is
53 * initialized so that the memory layout can be used while creating page
54 * tables. BL2 has flushed this information to memory, so we are guaranteed
55 * to pick up good data.
56 ******************************************************************************/
Antonio Nino Diaz83d8c792018-08-17 14:25:08 +010057void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
58 u_register_t arg2, u_register_t arg3)
59
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000060{
61 /* Initialize the console to provide early debug support */
Antonio Nino Diaz1f470022018-03-27 09:39:47 +010062 rpi3_console_init();
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000063
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000064 /*
Antonio Nino Diaz83d8c792018-08-17 14:25:08 +010065 * In debug builds, a special value is passed in 'arg1' to verify
66 * platform parameters from BL2 to BL31. Not used in release builds.
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000067 */
Antonio Nino Diaz83d8c792018-08-17 14:25:08 +010068 assert(arg1 == RPI3_BL31_PLAT_PARAM_VAL);
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000069
Antonio Nino Diaz83d8c792018-08-17 14:25:08 +010070 /* Check that params passed from BL2 are not NULL. */
71 bl_params_t *params_from_bl2 = (bl_params_t *) arg0;
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000072
73 assert(params_from_bl2 != NULL);
74 assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
75 assert(params_from_bl2->h.version >= VERSION_2);
76
77 bl_params_node_t *bl_params = params_from_bl2->head;
78
79 /*
80 * Copy BL33 and BL32 (if present), entry point information.
81 * They are stored in Secure RAM, in BL2's address space.
82 */
83 while (bl_params) {
84 if (bl_params->image_id == BL32_IMAGE_ID) {
85 bl32_image_ep_info = *bl_params->ep_info;
86 }
87
88 if (bl_params->image_id == BL33_IMAGE_ID) {
89 bl33_image_ep_info = *bl_params->ep_info;
90 }
91
92 bl_params = bl_params->next_params_info;
93 }
94
95 if (bl33_image_ep_info.pc == 0) {
96 panic();
97 }
Antonio Nino Diazf8b36cc2018-07-15 12:32:32 +010098
99#if RPI3_DIRECT_LINUX_BOOT
100# if RPI3_BL33_IN_AARCH32
101 /*
102 * According to the file ``Documentation/arm/Booting`` of the Linux
103 * kernel tree, Linux expects:
104 * r0 = 0
105 * r1 = machine type number, optional in DT-only platforms (~0 if so)
106 * r2 = Physical address of the device tree blob
107 */
108 VERBOSE("rpi3: Preparing to boot 32-bit Linux kernel\n");
109 bl33_image_ep_info.args.arg0 = 0U;
110 bl33_image_ep_info.args.arg1 = ~0U;
111 bl33_image_ep_info.args.arg2 = (u_register_t) RPI3_PRELOADED_DTB_BASE;
112# else
113 /*
114 * According to the file ``Documentation/arm64/booting.txt`` of the
115 * Linux kernel tree, Linux expects the physical address of the device
116 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and
117 * must be 0.
118 */
119 VERBOSE("rpi3: Preparing to boot 64-bit Linux kernel\n");
120 bl33_image_ep_info.args.arg0 = (u_register_t) RPI3_PRELOADED_DTB_BASE;
121 bl33_image_ep_info.args.arg1 = 0ULL;
122 bl33_image_ep_info.args.arg2 = 0ULL;
123 bl33_image_ep_info.args.arg3 = 0ULL;
124# endif /* RPI3_BL33_IN_AARCH32 */
125#endif /* RPI3_DIRECT_LINUX_BOOT */
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000126}
127
128void bl31_plat_arch_setup(void)
129{
130 rpi3_setup_page_tables(BL31_BASE, BL31_END - BL31_BASE,
131 BL_CODE_BASE, BL_CODE_END,
132 BL_RO_DATA_BASE, BL_RO_DATA_END
133#if USE_COHERENT_MEM
134 , BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END
135#endif
136 );
137
138 enable_mmu_el3(0);
139}
140
Antonio Nino Diazf96582a2018-10-19 00:57:16 +0100141/*
142 * Add information to the device tree (if any) about the reserved DRAM used by
143 * the Trusted Firmware.
144 */
145static void rpi3_dtb_add_mem_rsv(void)
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000146{
Antonio Nino Diazf96582a2018-10-19 00:57:16 +0100147 int i, regions, rc;
148 uint64_t addr, size;
149 void *dtb = (void *)RPI3_PRELOADED_DTB_BASE;
150
151 INFO("rpi3: Checking DTB...\n");
152
153 /* Return if no device tree is detected */
154 if (fdt_check_header(dtb) != 0)
155 return;
156
157 regions = fdt_num_mem_rsv(dtb);
158
159 VERBOSE("rpi3: Found %d mem reserve region(s)\n", regions);
160
161 /* We expect to find one reserved region that we can modify */
162 if (regions < 1)
163 return;
164
165 /*
166 * Look for the region that corresponds to the default boot firmware. It
167 * starts at address 0, and it is not needed when the default firmware
168 * is replaced by this port of the Trusted Firmware.
169 */
170 for (i = 0; i < regions; i++) {
171 if (fdt_get_mem_rsv(dtb, i, &addr, &size) != 0)
172 continue;
173
174 if (addr != 0x0)
175 continue;
176
177 VERBOSE("rpi3: Firmware mem reserve region found\n");
178
179 rc = fdt_del_mem_rsv(dtb, i);
180 if (rc != 0) {
181 INFO("rpi3: Can't remove mem reserve region (%d)\n", rc);
182 }
183
184 break;
185 }
186
187 if (i == regions) {
188 VERBOSE("rpi3: Firmware mem reserve region not found\n");
189 }
190
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000191 /*
Antonio Nino Diazf96582a2018-10-19 00:57:16 +0100192 * Reserve all SRAM. As said in the documentation, this isn't actually
193 * secure memory, so it is needed to tell BL33 that this is a reserved
194 * memory region. It doesn't guarantee it won't use it, though.
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000195 */
Antonio Nino Diazf96582a2018-10-19 00:57:16 +0100196 rc = fdt_add_mem_rsv(dtb, SEC_SRAM_BASE, SEC_SRAM_SIZE);
197 if (rc != 0) {
198 WARN("rpi3: Can't add mem reserve region (%d)\n", rc);
199 }
200
201 INFO("rpi3: Reserved 0x%llx - 0x%llx in DTB\n", SEC_SRAM_BASE,
202 SEC_SRAM_BASE + SEC_SRAM_SIZE);
203}
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000204
Antonio Nino Diazf96582a2018-10-19 00:57:16 +0100205void bl31_platform_setup(void)
206{
207#ifdef RPI3_PRELOADED_DTB_BASE
208 /* Only modify a DTB if we know where to look for it */
209 rpi3_dtb_add_mem_rsv();
210#endif
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000211}