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git01.mediatek.com / filogic / atf / eba155ad8fe5ab549812fc1ff237907a49e43a02 / . / plat / arm / board / rde1edge / platform.mk
blob: 43c37ffc11a3eea9ed3f3047e96e3c0f187f9eb2 [file] [log] [blame]
Chandni Cherukuri626a52d2018-08-16 13:43:23 +0530[diff] [blame]1#
Vijayenthiran Subramaniamf5cb00f2019-12-27 19:27:57 +0530[diff] [blame]2# Copyright (c) 2018-2020, Arm Limited. All rights reserved.
Chandni Cherukuri626a52d2018-08-16 13:43:23 +0530[diff] [blame]3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include plat/arm/css/sgi/sgi-common.mk
8
Chandni Cherukuri533b5542019-02-22 16:44:49 +0530[diff] [blame]9RDE1EDGE_BASE = plat/arm/board/rde1edge
Chandni Cherukuri626a52d2018-08-16 13:43:23 +0530[diff] [blame]10
Chandni Cherukuri533b5542019-02-22 16:44:49 +0530[diff] [blame]11PLAT_INCLUDES += -I${RDE1EDGE_BASE}/include/
Chandni Cherukuri626a52d2018-08-16 13:43:23 +0530[diff] [blame]12
John Tsichritzis16e6d9f2019-02-19 14:01:55 +0000[diff] [blame]13SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_e1.S
Chandni Cherukuri626a52d2018-08-16 13:43:23 +0530[diff] [blame]14
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100[diff] [blame]15BL1_SOURCES += ${SGI_CPU_SOURCES} \
16 ${RDE1EDGE_BASE}/rde1edge_err.c
Chandni Cherukuri626a52d2018-08-16 13:43:23 +0530[diff] [blame]17
Chandni Cherukuri533b5542019-02-22 16:44:49 +0530[diff] [blame]18BL2_SOURCES += ${RDE1EDGE_BASE}/rde1edge_plat.c \
19 ${RDE1EDGE_BASE}/rde1edge_security.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100[diff] [blame]20 ${RDE1EDGE_BASE}/rde1edge_err.c \
Chandni Cherukuri626a52d2018-08-16 13:43:23 +0530[diff] [blame]21 drivers/arm/tzc/tzc_dmc620.c \
22 lib/utils/mem_region.c \
23 plat/arm/common/arm_nor_psci_mem_protect.c
24
25BL31_SOURCES += ${SGI_CPU_SOURCES} \
Chandni Cherukuri533b5542019-02-22 16:44:49 +0530[diff] [blame]26 ${RDE1EDGE_BASE}/rde1edge_plat.c \
Vijayenthiran Subramaniamf5cb00f2019-12-27 19:27:57 +0530[diff] [blame]27 ${RDE1EDGE_BASE}/rde1edge_topology.c \
Chandni Cherukuri626a52d2018-08-16 13:43:23 +0530[diff] [blame]28 drivers/cfi/v2m/v2m_flash.c \
29 lib/utils/mem_region.c \
30 plat/arm/common/arm_nor_psci_mem_protect.c
31
32# Add the FDT_SOURCES and options for Dynamic Config
Chandni Cherukuri533b5542019-02-22 16:44:49 +0530[diff] [blame]33FDT_SOURCES += ${RDE1EDGE_BASE}/fdts/${PLAT}_tb_fw_config.dts
Chandni Cherukuri626a52d2018-08-16 13:43:23 +0530[diff] [blame]34TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
35
36# Add the TB_FW_CONFIG to FIP and specify the same to certtool
37$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config))
38
Chandni Cherukuri533b5542019-02-22 16:44:49 +0530[diff] [blame]39FDT_SOURCES += ${RDE1EDGE_BASE}/fdts/${PLAT}_nt_fw_config.dts
Chandni Cherukuri626a52d2018-08-16 13:43:23 +0530[diff] [blame]40NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
41
42# Add the NT_FW_CONFIG to FIP and specify the same to certtool
43$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config))
44
45override CTX_INCLUDE_AARCH32_REGS := 0