blob: 245fd17d75ac8f94a23e8b0d4588be6188d75977 [file] [log] [blame]
Yann Gautier41934662018-07-20 11:36:05 +02001/*
2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <dt-bindings/clock/stm32mp1-clks.h>
8#include <errno.h>
9#include <mmio.h>
10#include <platform_def.h>
11#include <stm32mp1_clk.h>
12#include <stm32mp1_context.h>
13
14#define TAMP_BOOT_ITF_BACKUP_REG_ID U(20)
15#define TAMP_BOOT_ITF_MASK U(0x0000FF00)
16#define TAMP_BOOT_ITF_SHIFT 8
17
18int stm32_save_boot_interface(uint32_t interface, uint32_t instance)
19{
20 uint32_t tamp_clk_off = 0;
21 uint32_t bkpr_itf_idx = tamp_bkpr(TAMP_BOOT_ITF_BACKUP_REG_ID);
22
23 if (!stm32mp1_clk_is_enabled(RTCAPB)) {
24 tamp_clk_off = 1;
25 if (stm32mp1_clk_enable(RTCAPB) != 0) {
26 return -EINVAL;
27 }
28 }
29
30 mmio_clrsetbits_32(bkpr_itf_idx,
31 TAMP_BOOT_ITF_MASK,
32 ((interface << 4) | (instance & 0xFU)) <<
33 TAMP_BOOT_ITF_SHIFT);
34
35 if (tamp_clk_off != 0U) {
36 if (stm32mp1_clk_disable(RTCAPB) != 0) {
37 return -EINVAL;
38 }
39 }
40
41 return 0;
42}