| Jorge Ramirez-Ortiz | f7c14d5 | 2018-09-23 09:39:37 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | #include "micro_delay.h" |
| 10 | |
| 11 | #define CPG_BASE (0xE6150000) |
| 12 | #define CPG_SMSTPCR1 (0x0134) |
| 13 | #define CPG_CPGWPR (0x0900) |
| 14 | |
| 15 | /* Module bit for TMU ch3-5 */ |
| 16 | #define MSTPCR1_TMU1 (1 << 24) |
| 17 | |
| 18 | #define TMU3_BASE (0xE6FC0000) |
| 19 | #define TMU_TSTR (0x0004) |
| 20 | #define TMU_TCOR (0x0008) |
| 21 | #define TMU_TCNT (0x000C) |
| 22 | #define TMU_TCR (0x0010) |
| 23 | /* Start bit for TMU ch3 */ |
| 24 | #define TSTR1_TMU3 (1 << 0) |
| 25 | |
| 26 | #define MIDR_CA57 (0x0D07 << MIDR_PN_SHIFT) |
| 27 | #define MIDR_CA53 (0x0D03 << MIDR_PN_SHIFT) |
| 28 | |
| 29 | .globl rcar_micro_delay |
| 30 | #if (TMU3_MEASUREMENT == 1) |
| 31 | .globl tmu3_init |
| 32 | .globl tmu3_start |
| 33 | .globl tmu3_stop |
| 34 | .globl tcnt3_snapshot |
| 35 | #endif |
| 36 | /* Aligned with the cache line */ |
| 37 | .align 6 |
| 38 | |
| 39 | func rcar_micro_delay |
| 40 | cbz x0, micro_delay_e |
| 41 | mrs x1, midr_el1 |
| 42 | and x1, x1, #MIDR_PN_MASK << MIDR_PN_SHIFT |
| 43 | mov w2, #MIDR_CA53 |
| 44 | cmp w1, w2 |
| 45 | b.eq micro_delay_ca53 |
| 46 | b micro_delay_ca57 |
| 47 | micro_delay_e: |
| 48 | ret |
| 49 | endfunc rcar_micro_delay |
| 50 | |
| 51 | func micro_delay_ca57 |
| 52 | ca57_loop_1: |
| 53 | mov x1, #185 |
| 54 | ca57_loop_2: |
| 55 | subs x1, x1, #1 |
| 56 | b.ne ca57_loop_2 |
| 57 | subs x0, x0, #1 |
| 58 | b.ne ca57_loop_1 |
| 59 | ret |
| 60 | endfunc micro_delay_ca57 |
| 61 | |
| 62 | func micro_delay_ca53 |
| 63 | ca53_loop_1: |
| 64 | mov x1, #134 |
| 65 | ca53_loop_2: |
| 66 | subs x1, x1, #1 |
| 67 | b.ne ca53_loop_2 |
| 68 | subs x0, x0, #1 |
| 69 | b.ne ca53_loop_1 |
| 70 | ret |
| 71 | endfunc micro_delay_ca53 |
| 72 | |
| 73 | #if (TMU3_MEASUREMENT == 1) |
| 74 | func tmu3_init |
| 75 | ldr x2, =CPG_BASE |
| 76 | ldr w0, [x2, #CPG_SMSTPCR1] |
| 77 | ldr w1, [x2, #CPG_MSTPSR1] |
| 78 | ldr w2, #MSTPCR1_TMU1 |
| 79 | bl mstpcr_write |
| 80 | ret |
| 81 | endfunc tmu3_init |
| 82 | |
| 83 | func tmu3_start |
| 84 | ldr x0, =TMU3_BASE |
| 85 | mov w1, #0xFFFFFFFF |
| 86 | str w1, [x0, TMU_TCNT] |
| 87 | |
| 88 | ldr x0, =TMU3_BASE |
| 89 | ldrb w1, [x0, TMU_TSTR] |
| 90 | orr w1, w1, #TSTR1_TMU3 |
| 91 | strb w1, [x0, TMU_TSTR] |
| 92 | ret |
| 93 | endfunc tmu3_start |
| 94 | |
| 95 | func tcnt3_snapshot |
| 96 | ldr x0, =TMU3_BASE |
| 97 | ldr w0, [x0, TMU_TCNT] |
| 98 | ret |
| 99 | endfunc tcnt3_snapshot |
| 100 | |
| 101 | |
| 102 | func tmu3_stop |
| 103 | ldr x0, =TMU3_BASE |
| 104 | ldrb w1, [x0, TMU_TSTR] |
| 105 | and w1, w1, #~TSTR1_TMU3 |
| 106 | strb w1, [x0, TMU_TSTR] |
| 107 | ret |
| 108 | endfunc tmu3_stop |
| 109 | #endif |