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git01.mediatek.com / filogic / atf / ea4431b0cd4c87b1353f8423867afa2955225674 / . / services / std_svc / rmmd / trp / trp_entry.S
blob: 47c1df14d0af61e4f17419d63ecd4251e3045470 [file] [log] [blame]
Zelalem Awekec8bc23e2021-07-09 15:32:21 -0500[diff] [blame]1/*
Soby Mathew68ea9542022-03-22 13:58:52 +0000[diff] [blame]2 * Copyright (c) 2021-2022, Arm Limited. All rights reserved.
Zelalem Awekec8bc23e2021-07-09 15:32:21 -0500[diff] [blame]3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <asm_macros.S>
Soby Mathew68ea9542022-03-22 13:58:52 +0000[diff] [blame]8#include <services/rmmd_svc.h>
Javier Almansa Sobrino7176a772021-11-24 18:37:37 +0000[diff] [blame]9
10#include <platform_def.h>
Zelalem Awekec8bc23e2021-07-09 15:32:21 -0500[diff] [blame]11#include "trp_private.h"
12
13.global trp_head
14.global trp_smc
15
16.section ".head.text", "ax"
17
18 /* ---------------------------------------------
19 * Populate the params in x0-x7 from the pointer
20 * to the smc args structure in x0.
21 * ---------------------------------------------
22 */
23 .macro restore_args_call_smc
24 ldp x6, x7, [x0, #TRP_ARG6]
25 ldp x4, x5, [x0, #TRP_ARG4]
26 ldp x2, x3, [x0, #TRP_ARG2]
27 ldp x0, x1, [x0, #TRP_ARG0]
28 smc #0
29 .endm
30
31 /* ---------------------------------------------
32 * Entry point for TRP
33 * ---------------------------------------------
34 */
35trp_head:
Javier Almansa Sobrino7176a772021-11-24 18:37:37 +0000[diff] [blame]36 /*
37 * Stash arguments from previous boot stage
38 */
39 mov x20, x0
40 mov x21, x1
41 mov x22, x2
42 mov x23, x3
43
44 /*
45 * Validate CPUId before allocating a stack.
46 */
47 cmp x20, #PLATFORM_CORE_COUNT
48 b.lo 1f
49
50 mov_imm x0, RMM_BOOT_COMPLETE
51 mov_imm x1, E_RMM_BOOT_CPU_ID_OUT_OF_RANGE
52 smc #0
53
54 /* EL3 should never return back here, so panic if it does */
55 b trp_panic
56
571:
Zelalem Awekec8bc23e2021-07-09 15:32:21 -0500[diff] [blame]58 bl plat_set_my_stack
Mark Dykes50746c82021-12-01 15:08:02 -0600[diff] [blame]59
60 /*
61 * Find out whether this is a cold or warm boot
62 */
63 ldr x1, cold_boot_flag
64 cbz x1, warm_boot
65
66 /*
67 * Update cold boot flag to indicate cold boot is done
68 */
69 adr x2, cold_boot_flag
70 str xzr, [x2]
71
Zelalem Awekec8bc23e2021-07-09 15:32:21 -0500[diff] [blame]72 /* ---------------------------------------------
73 * Zero out BSS section
74 * ---------------------------------------------
75 */
76 ldr x0, =__BSS_START__
77 ldr x1, =__BSS_SIZE__
78 bl zeromem
79
Javier Almansa Sobrino7176a772021-11-24 18:37:37 +0000[diff] [blame]80 mov x0, x20
81 mov x1, x21
82 mov x2, x22
83 mov x3, x23
Zelalem Awekec8bc23e2021-07-09 15:32:21 -0500[diff] [blame]84 bl trp_setup
Zelalem Awekec8bc23e2021-07-09 15:32:21 -0500[diff] [blame]85 bl trp_main
Mark Dykes50746c82021-12-01 15:08:02 -0600[diff] [blame]86warm_boot:
Javier Almansa Sobrino7176a772021-11-24 18:37:37 +0000[diff] [blame]87 mov_imm x0, RMM_BOOT_COMPLETE
88 mov x1, xzr /* RMM_BOOT_SUCCESS */
Zelalem Awekec8bc23e2021-07-09 15:32:21 -0500[diff] [blame]89 smc #0
90 b trp_handler
91
Javier Almansa Sobrino7176a772021-11-24 18:37:37 +0000[diff] [blame]92trp_panic:
93 no_ret plat_panic_handler
94
Mark Dykes50746c82021-12-01 15:08:02 -0600[diff] [blame]95 /*
96 * Flag to mark if it is a cold boot.
97 * 1: cold boot, 0: warmboot.
98 */
99.align 3
100cold_boot_flag:
101 .dword 1
102
Zelalem Awekec8bc23e2021-07-09 15:32:21 -0500[diff] [blame]103 /* ---------------------------------------------
104 * Direct SMC call to BL31 service provided by
105 * RMM Dispatcher
106 * ---------------------------------------------
107 */
108func trp_smc
109 restore_args_call_smc
110 ret
111endfunc trp_smc
112
113 /* ---------------------------------------------
114 * RMI call handler
115 * ---------------------------------------------
116 */
117func trp_handler
118 bl trp_rmi_handler
119 restore_args_call_smc
120 b trp_handler
121endfunc trp_handler