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Manish V Badarkhe51a97112021-07-08 09:33:18 +01001/*
Jayanth Dodderi Chidanand118b3352024-06-18 15:22:54 +01002 * Copyright (c) 2021-2024, Arm Limited. All rights reserved.
Manish V Badarkhe51a97112021-07-08 09:33:18 +01003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef TRF_H
8#define TRF_H
9
Jayanth Dodderi Chidanand118b3352024-06-18 15:22:54 +010010#include <context.h>
11
Jayanth Dodderi Chidanand77b8b872023-03-01 15:35:28 +000012#if ENABLE_TRF_FOR_NS
Jayanth Dodderi Chidanand118b3352024-06-18 15:22:54 +010013
14#if __aarch64__
15void trf_enable(cpu_context_t *ctx);
Boyan Karatotev6468d4a2023-02-16 15:12:45 +000016void trf_init_el2_unused(void);
Jayanth Dodderi Chidanand118b3352024-06-18 15:22:54 +010017#else /* !__aarch64 */
18void trf_init_el3(void);
19#endif /* __aarch64__ */
20
21#else /* ENABLE_TRF_FOR_NS=0 */
22
23#if __aarch64__
24static inline void trf_enable(cpu_context_t *ctx)
Boyan Karatotev6468d4a2023-02-16 15:12:45 +000025{
26}
27static inline void trf_init_el2_unused(void)
Jayanth Dodderi Chidanand77b8b872023-03-01 15:35:28 +000028{
29}
Jayanth Dodderi Chidanand118b3352024-06-18 15:22:54 +010030#else /* !__aarch64 */
31static inline void trf_init_el3(void)
32{
33}
34#endif /* __aarch64__*/
35
Jayanth Dodderi Chidanand77b8b872023-03-01 15:35:28 +000036#endif /* ENABLE_TRF_FOR_NS */
Manish V Badarkhe51a97112021-07-08 09:33:18 +010037
38#endif /* TRF_H */