Gitiles
Code Review Sign In
git01.mediatek.com / filogic / atf / e9919bbcdd89fb7a20789b36e7e688253df4bad7 / . / plat / mediatek / mt8173 / platform.mk
blob: 0726efe45d25b31d96a92db5471daf968b0d06c7 [file] [log] [blame]
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]1#
dp-arm230011c2017-03-07 11:02:47 +0000[diff] [blame]2# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]3#
dp-armfa3cf0b2017-05-03 09:38:09 +0100[diff] [blame]4# SPDX-License-Identifier: BSD-3-Clause
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]5#
6
7MTK_PLAT := plat/mediatek
8MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT}
9
10PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
developer550bf5e2016-07-11 16:05:23 +0800[diff] [blame]11 -I${MTK_PLAT}/common/drivers/uart/ \
Koan-Sin Tan1d2b6392016-04-18 15:17:57 +0800[diff] [blame]12 -Iinclude/plat/arm/common/aarch64 \
developereee29802016-05-11 18:45:20 +0800[diff] [blame]13 -I${MTK_PLAT_SOC}/drivers/crypt/ \
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]14 -I${MTK_PLAT_SOC}/drivers/mtcmos/ \
15 -I${MTK_PLAT_SOC}/drivers/pmic/ \
16 -I${MTK_PLAT_SOC}/drivers/rtc/ \
17 -I${MTK_PLAT_SOC}/drivers/spm/ \
18 -I${MTK_PLAT_SOC}/drivers/timer/ \
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]19 -I${MTK_PLAT_SOC}/include/
20
Soby Mathewcc037c12016-04-08 16:42:58 +0100[diff] [blame]21PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
22 lib/xlat_tables/aarch64/xlat_tables.c \
Koan-Sin Tan1d2b6392016-04-18 15:17:57 +0800[diff] [blame]23 plat/arm/common/arm_gicv2.c \
24 plat/common/plat_gicv2.c
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]25
26BL31_SOURCES += drivers/arm/cci/cci.c \
Koan-Sin Tan1d2b6392016-04-18 15:17:57 +0800[diff] [blame]27 drivers/arm/gic/common/gic_common.c \
28 drivers/arm/gic/v2/gicv2_main.c \
29 drivers/arm/gic/v2/gicv2_helpers.c \
Soby Mathew17231132016-08-08 12:33:06 +0100[diff] [blame]30 drivers/console/aarch64/console.S \
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]31 drivers/delay_timer/delay_timer.c \
Antonio Nino Diaz02a09af2016-05-05 15:23:56 +0100[diff] [blame]32 drivers/delay_timer/generic_delay_timer.c \
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]33 lib/cpus/aarch64/aem_generic.S \
34 lib/cpus/aarch64/cortex_a53.S \
35 lib/cpus/aarch64/cortex_a57.S \
36 lib/cpus/aarch64/cortex_a72.S \
developer550bf5e2016-07-11 16:05:23 +0800[diff] [blame]37 ${MTK_PLAT}/common/drivers/uart/8250_console.S \
developer14f3fe32016-04-28 14:07:42 +0800[diff] [blame]38 ${MTK_PLAT}/common/mtk_plat_common.c \
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]39 ${MTK_PLAT}/common/mtk_sip_svc.c \
40 ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \
41 ${MTK_PLAT_SOC}/aarch64/platform_common.c \
42 ${MTK_PLAT_SOC}/bl31_plat_setup.c \
developereee29802016-05-11 18:45:20 +0800[diff] [blame]43 ${MTK_PLAT_SOC}/drivers/crypt/crypt.c \
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]44 ${MTK_PLAT_SOC}/drivers/mtcmos/mtcmos.c \
45 ${MTK_PLAT_SOC}/drivers/pmic/pmic_wrap_init.c \
46 ${MTK_PLAT_SOC}/drivers/rtc/rtc.c \
47 ${MTK_PLAT_SOC}/drivers/spm/spm.c \
48 ${MTK_PLAT_SOC}/drivers/spm/spm_hotplug.c \
49 ${MTK_PLAT_SOC}/drivers/spm/spm_mcdi.c \
50 ${MTK_PLAT_SOC}/drivers/spm/spm_suspend.c \
51 ${MTK_PLAT_SOC}/drivers/timer/mt_cpuxgpt.c \
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]52 ${MTK_PLAT_SOC}/plat_pm.c \
53 ${MTK_PLAT_SOC}/plat_sip_calls.c \
54 ${MTK_PLAT_SOC}/plat_topology.c \
55 ${MTK_PLAT_SOC}/power_tracer.c \
56 ${MTK_PLAT_SOC}/scu.c
57
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]58# Enable workarounds for selected Cortex-A53 erratas.
59ERRATA_A53_826319 := 1
60ERRATA_A53_836870 := 1
Andre Przywarabf7f2f02016-11-07 10:53:14 +0000[diff] [blame]61ERRATA_A53_855873 := 1
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]62
63# indicate the reset vector address can be programmed
64PROGRAMMABLE_RESET_ADDRESS := 1
developer14f3fe32016-04-28 14:07:42 +0800[diff] [blame]65
66$(eval $(call add_define,MTK_SIP_SET_AUTHORIZED_SECURE_REG_ENABLE))
David Cunadoc5b0c0f2017-10-31 23:19:21 +0000[diff] [blame]67
68# Do not enable SVE
69ENABLE_SVE_FOR_NS := 0