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Haojian Zhuang602362d2017-06-01 12:15:14 +08001#
Masahiro Yamada4d156802018-01-26 11:42:01 +09002# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
Haojian Zhuang602362d2017-06-01 12:15:14 +08003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Haojian Zhuang1b4b4122018-01-25 16:13:05 +08007# Non-TF Boot ROM
8BL2_AT_EL3 := 1
9
Victor Chong91287682017-05-28 00:14:37 +090010# On Hikey960, the TSP can execute from TZC secure area in DRAM.
Victor Chong4d64c2b2018-02-01 00:37:49 +090011HIKEY960_TSP_RAM_LOCATION ?= dram
Victor Chong91287682017-05-28 00:14:37 +090012ifeq (${HIKEY960_TSP_RAM_LOCATION}, dram)
13 HIKEY960_TSP_RAM_LOCATION_ID = HIKEY960_DRAM_ID
14else ifeq (${HIKEY960_TSP_RAM_LOCATION}, sram)
Victor Chong4d64c2b2018-02-01 00:37:49 +090015 HIKEY960_TSP_RAM_LOCATION_ID = HIKEY960_SRAM_ID
Victor Chong91287682017-05-28 00:14:37 +090016else
17 $(error "Currently unsupported HIKEY960_TSP_RAM_LOCATION value")
18endif
19
Haojian Zhuang602362d2017-06-01 12:15:14 +080020CRASH_CONSOLE_BASE := PL011_UART6_BASE
21COLD_BOOT_SINGLE_CPU := 1
Kaihua Zhong39ff2ee2018-07-16 17:33:48 +080022PLAT_PL061_MAX_GPIOS := 176
Haojian Zhuang602362d2017-06-01 12:15:14 +080023PROGRAMMABLE_RESET_ADDRESS := 1
David Cunadoc5b0c0f2017-10-31 23:19:21 +000024ENABLE_SVE_FOR_NS := 0
Haojian Zhuang602362d2017-06-01 12:15:14 +080025
26# Process flags
Victor Chong91287682017-05-28 00:14:37 +090027$(eval $(call add_define,HIKEY960_TSP_RAM_LOCATION_ID))
Haojian Zhuang602362d2017-06-01 12:15:14 +080028$(eval $(call add_define,CRASH_CONSOLE_BASE))
Kaihua Zhong39ff2ee2018-07-16 17:33:48 +080029$(eval $(call add_define,PLAT_PL061_MAX_GPIOS))
Haojian Zhuang602362d2017-06-01 12:15:14 +080030
Victor Chong7d787f52017-08-16 13:53:56 +090031# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
32# in the FIP if the platform requires.
33ifneq ($(BL32_EXTRA1),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +090034$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
Victor Chong7d787f52017-08-16 13:53:56 +090035endif
36ifneq ($(BL32_EXTRA2),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +090037$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
Victor Chong7d787f52017-08-16 13:53:56 +090038endif
39
Haojian Zhuang602362d2017-06-01 12:15:14 +080040USE_COHERENT_MEM := 1
41
42PLAT_INCLUDES := -Iinclude/common/tbbr \
43 -Iplat/hisilicon/hikey960/include
44
Antonio Nino Diaz582c2d72018-09-24 17:23:47 +010045PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/aarch64/pl011_console.S \
Haojian Zhuang602362d2017-06-01 12:15:14 +080046 drivers/delay_timer/delay_timer.c \
47 drivers/delay_timer/generic_delay_timer.c \
Antonio Nino Diaz582c2d72018-09-24 17:23:47 +010048 lib/xlat_tables/aarch64/xlat_tables.c \
49 lib/xlat_tables/xlat_tables_common.c \
Haojian Zhuang602362d2017-06-01 12:15:14 +080050 plat/hisilicon/hikey960/aarch64/hikey960_common.c \
51 plat/hisilicon/hikey960/hikey960_boardid.c
52
53HIKEY960_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
54 drivers/arm/gic/v2/gicv2_main.c \
55 drivers/arm/gic/v2/gicv2_helpers.c \
56 plat/common/plat_gicv2.c
57
58BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \
Kaihua Zhong39ff2ee2018-07-16 17:33:48 +080059 drivers/arm/pl061/pl061_gpio.c \
60 drivers/gpio/gpio.c \
Haojian Zhuang602362d2017-06-01 12:15:14 +080061 drivers/io/io_block.c \
62 drivers/io/io_fip.c \
63 drivers/io/io_storage.c \
64 drivers/synopsys/ufs/dw_ufs.c \
65 drivers/ufs/ufs.c \
66 lib/cpus/aarch64/cortex_a53.S \
67 plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \
Haojian Zhuangd82e29d2018-03-05 13:20:33 +080068 plat/hisilicon/hikey960/hikey960_bl1_setup.c \
69 plat/hisilicon/hikey960/hikey960_bl_common.c \
Haojian Zhuang602362d2017-06-01 12:15:14 +080070 plat/hisilicon/hikey960/hikey960_io_storage.c \
71 ${HIKEY960_GIC_SOURCES}
Haojian Zhuang1f73c0c2017-06-01 14:03:22 +080072
Haojian Zhuanga94d75d2018-01-29 12:45:28 +080073BL2_SOURCES += common/desc_image_load.c \
Kaihua Zhong39ff2ee2018-07-16 17:33:48 +080074 drivers/arm/pl061/pl061_gpio.c \
75 drivers/gpio/gpio.c \
Haojian Zhuanga94d75d2018-01-29 12:45:28 +080076 drivers/io/io_block.c \
Haojian Zhuang1f73c0c2017-06-01 14:03:22 +080077 drivers/io/io_fip.c \
78 drivers/io/io_storage.c \
Haojian Zhuang1b4b4122018-01-25 16:13:05 +080079 drivers/synopsys/ufs/dw_ufs.c \
Haojian Zhuang1f73c0c2017-06-01 14:03:22 +080080 drivers/ufs/ufs.c \
Haojian Zhuang1b4b4122018-01-25 16:13:05 +080081 lib/cpus/aarch64/cortex_a53.S \
82 plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \
Haojian Zhuanga94d75d2018-01-29 12:45:28 +080083 plat/hisilicon/hikey960/hikey960_bl2_mem_params_desc.c \
Haojian Zhuang1f73c0c2017-06-01 14:03:22 +080084 plat/hisilicon/hikey960/hikey960_bl2_setup.c \
Haojian Zhuangd82e29d2018-03-05 13:20:33 +080085 plat/hisilicon/hikey960/hikey960_bl_common.c \
Haojian Zhuanga94d75d2018-01-29 12:45:28 +080086 plat/hisilicon/hikey960/hikey960_image_load.c \
Haojian Zhuang1f73c0c2017-06-01 14:03:22 +080087 plat/hisilicon/hikey960/hikey960_io_storage.c \
88 plat/hisilicon/hikey960/hikey960_mcu_load.c
Haojian Zhuang1b5c2252017-06-01 15:20:46 +080089
Victor Chong7d787f52017-08-16 13:53:56 +090090ifeq (${SPD},opteed)
91BL2_SOURCES += lib/optee/optee_utils.c
92endif
Victor Chong2d9a42d2017-08-17 15:21:10 +090093
Haojian Zhuang1b5c2252017-06-01 15:20:46 +080094BL31_SOURCES += drivers/arm/cci/cci.c \
95 lib/cpus/aarch64/cortex_a53.S \
96 lib/cpus/aarch64/cortex_a72.S \
97 lib/cpus/aarch64/cortex_a73.S \
Antonio Nino Diaz582c2d72018-09-24 17:23:47 +010098 plat/common/plat_psci_common.c \
Haojian Zhuang1b5c2252017-06-01 15:20:46 +080099 plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \
100 plat/hisilicon/hikey960/hikey960_bl31_setup.c \
101 plat/hisilicon/hikey960/hikey960_pm.c \
102 plat/hisilicon/hikey960/hikey960_topology.c \
103 plat/hisilicon/hikey960/drivers/pwrc/hisi_pwrc.c \
104 plat/hisilicon/hikey960/drivers/ipc/hisi_ipc.c \
105 ${HIKEY960_GIC_SOURCES}
Victor Chongcb27a352017-07-12 01:07:29 +0900106
Teddy Reeddd3f0a82018-09-03 17:38:50 -0400107ifneq (${TRUSTED_BOARD_BOOT},0)
108
109include drivers/auth/mbedtls/mbedtls_crypto.mk
110include drivers/auth/mbedtls/mbedtls_x509.mk
111
Teddy Reeddd3f0a82018-09-03 17:38:50 -0400112AUTH_SOURCES := drivers/auth/auth_mod.c \
113 drivers/auth/crypto_mod.c \
114 drivers/auth/img_parser_mod.c \
115 drivers/auth/tbbr/tbbr_cot.c
116
117BL1_SOURCES += ${AUTH_SOURCES} \
118 plat/common/tbbr/plat_tbbr.c \
119 plat/hisilicon/hikey960/hikey960_tbbr.c \
120 plat/hisilicon/hikey960/hikey960_rotpk.S
121
122BL2_SOURCES += ${AUTH_SOURCES} \
123 plat/common/tbbr/plat_tbbr.c \
124 plat/hisilicon/hikey960/hikey960_tbbr.c \
125 plat/hisilicon/hikey960/hikey960_rotpk.S
126
127ROT_KEY = $(BUILD_PLAT)/rot_key.pem
128ROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin
129
130$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
131$(BUILD_PLAT)/bl1/hikey960_rotpk.o: $(ROTPK_HASH)
132$(BUILD_PLAT)/bl2/hikey960_rotpk.o: $(ROTPK_HASH)
133
134certificates: $(ROT_KEY)
135$(ROT_KEY): | $(BUILD_PLAT)
136 @echo " OPENSSL $@"
137 $(Q)openssl genrsa 2048 > $@ 2>/dev/null
138
139$(ROTPK_HASH): $(ROT_KEY)
140 @echo " OPENSSL $@"
141 $(Q)openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
142 openssl dgst -sha256 -binary > $@ 2>/dev/null
143endif
144
Victor Chongcb27a352017-07-12 01:07:29 +0900145# Enable workarounds for selected Cortex-A53 errata.
146ERRATA_A53_836870 := 1
147ERRATA_A53_843419 := 1
148ERRATA_A53_855873 := 1
Leo Yan453940d2017-11-22 17:10:39 +0800149
150FIP_ALIGN := 512