blob: 70bc5f8a79e9eab70ce44bcb0eace5c9acdfd9e4 [file] [log] [blame]
Jayanth Dodderi Chidanand34060b42024-09-02 20:55:13 +01001/*
2 * Copyright (c) 2024, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <arch_features.h>
9#include <arch_helpers.h>
10#include <lib/extensions/tcr2.h>
11
12void tcr2_enable(cpu_context_t *ctx)
13{
14 u_register_t reg;
15 el3_state_t *state;
16
17 state = get_el3state_ctx(ctx);
18
19 /* Set the TCR2EN bit in SCR_EL3 to enable access to TCR2_EL1,
20 * and TCR2_EL2 registers .
21 */
22
23 reg = read_ctx_reg(state, CTX_SCR_EL3);
24 reg |= SCR_TCR2EN_BIT;
25 write_ctx_reg(state, CTX_SCR_EL3, reg);
26}
27
28void tcr2_disable(cpu_context_t *ctx)
29{
30 u_register_t reg;
31 el3_state_t *state;
32
33 state = get_el3state_ctx(ctx);
34
35 /* Clear the TCR2EN bit in SCR_EL3 to disable access to TCR2_EL1,
36 * and TCR2_EL2 registers .
37 */
38
39 reg = read_ctx_reg(state, CTX_SCR_EL3);
40 reg &= ~SCR_TCR2EN_BIT;
41 write_ctx_reg(state, CTX_SCR_EL3, reg);
42}