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Boyan Karatoteve7d7c272023-01-25 16:55:18 +00001/*
Ryan Everett3f588c42024-05-14 14:47:09 +01002 * Copyright (c) 2023-2024, Arm Limited and Contributors. All rights reserved.
Boyan Karatoteve7d7c272023-01-25 16:55:18 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef CPU_OPS_H
8#define CPU_OPS_H
9
10#include <arch.h>
11
12#define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \
13 (MIDR_PN_MASK << MIDR_PN_SHIFT)
14
15/* Hardcode to keep compatible with assembly. sizeof(uintptr_t) */
16#if __aarch64__
17#define CPU_WORD_SIZE 8
18#else
19#define CPU_WORD_SIZE 4
20#endif /* __aarch64__ */
21
22/* The number of CPU operations allowed */
23#define CPU_MAX_PWR_DWN_OPS 2
24/* Special constant to specify that CPU has no reset function */
25#define CPU_NO_RESET_FUNC 0
26
27#if __aarch64__
28#define CPU_NO_EXTRA1_FUNC 0
29#define CPU_NO_EXTRA2_FUNC 0
30#define CPU_NO_EXTRA3_FUNC 0
31#endif /* __aarch64__ */
32
33
34/*
35 * Define the sizes of the fields in the cpu_ops structure. Word size is set per
36 * Aarch so keep these definitions the same and each can include whatever it
37 * needs.
38 */
39#define CPU_MIDR_SIZE CPU_WORD_SIZE
40#ifdef IMAGE_AT_EL3
41#define CPU_RESET_FUNC_SIZE CPU_WORD_SIZE
42#else
43#define CPU_RESET_FUNC_SIZE 0
44#endif /* IMAGE_AT_EL3 */
45#define CPU_EXTRA1_FUNC_SIZE CPU_WORD_SIZE
46#define CPU_EXTRA2_FUNC_SIZE CPU_WORD_SIZE
47#define CPU_EXTRA3_FUNC_SIZE CPU_WORD_SIZE
48#define CPU_E_HANDLER_FUNC_SIZE CPU_WORD_SIZE
49/* The power down core and cluster is needed only in BL31 and BL32 */
50#if defined(IMAGE_BL31) || defined(IMAGE_BL32)
51#define CPU_PWR_DWN_OPS_SIZE CPU_WORD_SIZE * CPU_MAX_PWR_DWN_OPS
52#else
53#define CPU_PWR_DWN_OPS_SIZE 0
54#endif /* defined(IMAGE_BL31) || defined(IMAGE_BL32) */
55
Boyan Karatotev821364e2023-01-27 09:35:10 +000056#define CPU_ERRATA_LIST_START_SIZE CPU_WORD_SIZE
57#define CPU_ERRATA_LIST_END_SIZE CPU_WORD_SIZE
Boyan Karatoteve7d7c272023-01-25 16:55:18 +000058/* Fields required to print errata status */
59#if REPORT_ERRATA
Boyan Karatotev821364e2023-01-27 09:35:10 +000060#define CPU_CPU_STR_SIZE CPU_WORD_SIZE
Boyan Karatoteve7d7c272023-01-25 16:55:18 +000061/* BL1 doesn't require mutual exclusion and printed flag. */
62#if defined(IMAGE_BL31) || defined(IMAGE_BL32)
63#define CPU_ERRATA_LOCK_SIZE CPU_WORD_SIZE
64#define CPU_ERRATA_PRINTED_SIZE CPU_WORD_SIZE
65#else
66#define CPU_ERRATA_LOCK_SIZE 0
67#define CPU_ERRATA_PRINTED_SIZE 0
68#endif /* defined(IMAGE_BL31) || defined(IMAGE_BL32) */
69#else
Boyan Karatotev821364e2023-01-27 09:35:10 +000070#define CPU_CPU_STR_SIZE 0
Boyan Karatoteve7d7c272023-01-25 16:55:18 +000071#define CPU_ERRATA_LOCK_SIZE 0
72#define CPU_ERRATA_PRINTED_SIZE 0
73#endif /* REPORT_ERRATA */
74
75#if defined(IMAGE_BL31) && CRASH_REPORTING
76#define CPU_REG_DUMP_SIZE CPU_WORD_SIZE
77#else
78#define CPU_REG_DUMP_SIZE 0
79#endif /* defined(IMAGE_BL31) && CRASH_REPORTING */
80
81
82/*
83 * Define the offsets to the fields in cpu_ops structure. Every offset is
84 * defined based on the offset and size of the previous field.
85 */
86#define CPU_MIDR 0
87#define CPU_RESET_FUNC CPU_MIDR + CPU_MIDR_SIZE
88#if __aarch64__
89#define CPU_EXTRA1_FUNC CPU_RESET_FUNC + CPU_RESET_FUNC_SIZE
90#define CPU_EXTRA2_FUNC CPU_EXTRA1_FUNC + CPU_EXTRA1_FUNC_SIZE
91#define CPU_EXTRA3_FUNC CPU_EXTRA2_FUNC + CPU_EXTRA2_FUNC_SIZE
92#define CPU_E_HANDLER_FUNC CPU_EXTRA3_FUNC + CPU_EXTRA3_FUNC_SIZE
93#define CPU_PWR_DWN_OPS CPU_E_HANDLER_FUNC + CPU_E_HANDLER_FUNC_SIZE
94#else
95#define CPU_PWR_DWN_OPS CPU_RESET_FUNC + CPU_RESET_FUNC_SIZE
96#endif /* __aarch64__ */
Boyan Karatotev821364e2023-01-27 09:35:10 +000097#define CPU_ERRATA_LIST_START CPU_PWR_DWN_OPS + CPU_PWR_DWN_OPS_SIZE
98#define CPU_ERRATA_LIST_END CPU_ERRATA_LIST_START + CPU_ERRATA_LIST_START_SIZE
Ryan Everett3f588c42024-05-14 14:47:09 +010099#define CPU_CPU_STR CPU_ERRATA_LIST_END + CPU_ERRATA_LIST_END_SIZE
Boyan Karatotev821364e2023-01-27 09:35:10 +0000100#define CPU_ERRATA_LOCK CPU_CPU_STR + CPU_CPU_STR_SIZE
Boyan Karatoteve7d7c272023-01-25 16:55:18 +0000101#define CPU_ERRATA_PRINTED CPU_ERRATA_LOCK + CPU_ERRATA_LOCK_SIZE
102#if __aarch64__
103#define CPU_REG_DUMP CPU_ERRATA_PRINTED + CPU_ERRATA_PRINTED_SIZE
104#define CPU_OPS_SIZE CPU_REG_DUMP + CPU_REG_DUMP_SIZE
105#else
106#define CPU_OPS_SIZE CPU_ERRATA_PRINTED + CPU_ERRATA_PRINTED_SIZE
107#endif /* __aarch64__ */
108
Boyan Karatotev06236c92023-01-25 18:50:10 +0000109#ifndef __ASSEMBLER__
110#include <lib/cassert.h>
111#include <lib/spinlock.h>
112
113struct cpu_ops {
114 unsigned long midr;
115#ifdef IMAGE_AT_EL3
116 void (*reset_func)(void);
117#endif /* IMAGE_AT_EL3 */
118#if __aarch64__
119 void (*extra1_func)(void);
120 void (*extra2_func)(void);
121 void (*extra3_func)(void);
122 void (*e_handler_func)(long es);
123#endif /* __aarch64__ */
124#if (defined(IMAGE_BL31) || defined(IMAGE_BL32)) && CPU_MAX_PWR_DWN_OPS
125 void (*pwr_dwn_ops[CPU_MAX_PWR_DWN_OPS])(void);
126#endif /* (defined(IMAGE_BL31) || defined(IMAGE_BL32)) && CPU_MAX_PWR_DWN_OPS */
Boyan Karatotev821364e2023-01-27 09:35:10 +0000127 void *errata_list_start;
128 void *errata_list_end;
Boyan Karatotev06236c92023-01-25 18:50:10 +0000129#if REPORT_ERRATA
Boyan Karatotev821364e2023-01-27 09:35:10 +0000130 char *cpu_str;
Boyan Karatotev06236c92023-01-25 18:50:10 +0000131#if defined(IMAGE_BL31) || defined(IMAGE_BL32)
132 spinlock_t *errata_lock;
133 unsigned int *errata_reported;
134#endif /* defined(IMAGE_BL31) || defined(IMAGE_BL32) */
135#endif /* REPORT_ERRATA */
136#if defined(IMAGE_BL31) && CRASH_REPORTING
137 void (*reg_dump)(void);
138#endif /* defined(IMAGE_BL31) && CRASH_REPORTING */
139} __packed;
140
141CASSERT(sizeof(struct cpu_ops) == CPU_OPS_SIZE,
142 assert_cpu_ops_asm_c_different_sizes);
143
144long cpu_get_rev_var(void);
145void *get_cpu_ops_ptr(void);
146
147#endif /* __ASSEMBLER__ */
Boyan Karatoteve7d7c272023-01-25 16:55:18 +0000148#endif /* CPU_OPS_H */