blob: 488be18c51d4623a3679f900b1022983910a5f54 [file] [log] [blame]
Govindraj Rajae48c36a2024-06-04 11:05:26 -05001/*
2 * Copyright (c) 2024, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef FVP_CPU_PWR_H
8#define FVP_CPU_PWR_H
9
10#ifndef __ASSEMBLER__
11#include <stdbool.h>
12#include <stdint.h>
13
14#if __aarch64__
15bool check_cpupwrctrl_el1_is_available(void);
16#endif /* __aarch64__ */
17#endif /* __ASSEMBLER__ */
18
19/*******************************************************************************
20 * CPU Power Control register specific definitions
21 ******************************************************************************/
22#define CPUPWRCTLR_EL1 S3_0_C15_C2_7
23#define CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
24
25#endif /* FVP_CPU_PWR_H */