Antonio Nino Diaz | c326c34 | 2019-01-11 11:20:10 +0000 | [diff] [blame] | 1 | /* |
Andre Przywara | bb0db3b | 2023-01-25 12:26:14 +0000 | [diff] [blame] | 2 | * Copyright (c) 2019-2023, Arm Limited. All rights reserved. |
Antonio Nino Diaz | c326c34 | 2019-01-11 11:20:10 +0000 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef ARCH_FEATURES_H |
| 8 | #define ARCH_FEATURES_H |
| 9 | |
| 10 | #include <stdbool.h> |
| 11 | |
| 12 | #include <arch_helpers.h> |
Andre Przywara | e8920f6 | 2022-11-10 14:28:01 +0000 | [diff] [blame] | 13 | #include <common/feat_detect.h> |
Antonio Nino Diaz | c326c34 | 2019-01-11 11:20:10 +0000 | [diff] [blame] | 14 | |
Andre Przywara | bb0db3b | 2023-01-25 12:26:14 +0000 | [diff] [blame] | 15 | #define ISOLATE_FIELD(reg, feat) \ |
| 16 | ((unsigned int)(((reg) >> (feat ## _SHIFT)) & (feat ## _MASK))) |
| 17 | |
Antonio Nino Diaz | d29d21e | 2019-02-06 09:23:04 +0000 | [diff] [blame] | 18 | static inline bool is_armv7_gentimer_present(void) |
| 19 | { |
| 20 | /* The Generic Timer is always present in an ARMv8-A implementation */ |
| 21 | return true; |
| 22 | } |
| 23 | |
Daniel Boulby | 44b4333 | 2020-11-25 16:36:46 +0000 | [diff] [blame] | 24 | static inline bool is_armv8_1_pan_present(void) |
| 25 | { |
| 26 | return ((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_PAN_SHIFT) & |
| 27 | ID_AA64MMFR1_EL1_PAN_MASK) != 0U; |
| 28 | } |
| 29 | |
| 30 | static inline bool is_armv8_1_vhe_present(void) |
| 31 | { |
| 32 | return ((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_VHE_SHIFT) & |
| 33 | ID_AA64MMFR1_EL1_VHE_MASK) != 0U; |
| 34 | } |
| 35 | |
Antonio Nino Diaz | c326c34 | 2019-01-11 11:20:10 +0000 | [diff] [blame] | 36 | static inline bool is_armv8_2_ttcnp_present(void) |
| 37 | { |
| 38 | return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_CNP_SHIFT) & |
| 39 | ID_AA64MMFR2_EL1_CNP_MASK) != 0U; |
| 40 | } |
| 41 | |
Juan Pablo Conde | e089a17 | 2022-06-29 17:44:43 -0400 | [diff] [blame] | 42 | static inline bool is_feat_pacqarma3_present(void) |
| 43 | { |
| 44 | uint64_t mask_id_aa64isar2 = |
| 45 | (ID_AA64ISAR2_GPA3_MASK << ID_AA64ISAR2_GPA3_SHIFT) | |
| 46 | (ID_AA64ISAR2_APA3_MASK << ID_AA64ISAR2_APA3_SHIFT); |
| 47 | |
| 48 | /* If any of the fields is not zero, QARMA3 algorithm is present */ |
| 49 | return (read_id_aa64isar2_el1() & mask_id_aa64isar2) != 0U; |
| 50 | } |
| 51 | |
Antonio Nino Diaz | 25cda67 | 2019-02-19 11:53:51 +0000 | [diff] [blame] | 52 | static inline bool is_armv8_3_pauth_present(void) |
| 53 | { |
Juan Pablo Conde | e089a17 | 2022-06-29 17:44:43 -0400 | [diff] [blame] | 54 | uint64_t mask_id_aa64isar1 = |
| 55 | (ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) | |
| 56 | (ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) | |
| 57 | (ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) | |
| 58 | (ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT); |
Antonio Nino Diaz | 25cda67 | 2019-02-19 11:53:51 +0000 | [diff] [blame] | 59 | |
Juan Pablo Conde | e089a17 | 2022-06-29 17:44:43 -0400 | [diff] [blame] | 60 | /* |
| 61 | * If any of the fields is not zero or QARMA3 is present, |
| 62 | * PAuth is present |
| 63 | */ |
| 64 | return ((read_id_aa64isar1_el1() & mask_id_aa64isar1) != 0U || |
| 65 | is_feat_pacqarma3_present()); |
Antonio Nino Diaz | 25cda67 | 2019-02-19 11:53:51 +0000 | [diff] [blame] | 66 | } |
| 67 | |
Daniel Boulby | 60786e7 | 2021-10-22 11:37:34 +0100 | [diff] [blame] | 68 | static inline bool is_armv8_4_dit_present(void) |
| 69 | { |
| 70 | return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) & |
| 71 | ID_AA64PFR0_DIT_MASK) == 1U; |
| 72 | } |
| 73 | |
Sathees Balya | 7415597 | 2019-01-25 11:36:01 +0000 | [diff] [blame] | 74 | static inline bool is_armv8_4_ttst_present(void) |
| 75 | { |
| 76 | return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) & |
| 77 | ID_AA64MMFR2_EL1_ST_MASK) == 1U; |
| 78 | } |
| 79 | |
Alexei Fedorov | 90f2e88 | 2019-05-24 12:17:09 +0100 | [diff] [blame] | 80 | static inline bool is_armv8_5_bti_present(void) |
| 81 | { |
| 82 | return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_BT_SHIFT) & |
| 83 | ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED; |
| 84 | } |
| 85 | |
Soby Mathew | 830f0ad | 2019-07-12 09:23:38 +0100 | [diff] [blame] | 86 | static inline unsigned int get_armv8_5_mte_support(void) |
| 87 | { |
| 88 | return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) & |
| 89 | ID_AA64PFR1_EL1_MTE_MASK); |
| 90 | } |
| 91 | |
Olivier Deprez | 2bae35f | 2020-04-16 13:39:06 +0200 | [diff] [blame] | 92 | static inline bool is_armv8_4_sel2_present(void) |
| 93 | { |
| 94 | return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SEL2_SHIFT) & |
| 95 | ID_AA64PFR0_SEL2_MASK) == 1ULL; |
| 96 | } |
| 97 | |
johpow01 | 3e24c16 | 2020-04-22 14:05:13 -0500 | [diff] [blame] | 98 | static inline bool is_armv8_6_twed_present(void) |
| 99 | { |
| 100 | return (((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_TWED_SHIFT) & |
| 101 | ID_AA64MMFR1_EL1_TWED_MASK) == ID_AA64MMFR1_EL1_TWED_SUPPORTED); |
| 102 | } |
| 103 | |
Andre Przywara | e8920f6 | 2022-11-10 14:28:01 +0000 | [diff] [blame] | 104 | static unsigned int read_feat_fgt_id_field(void) |
Jimmy Brisson | ecc3c67 | 2020-04-16 10:47:56 -0500 | [diff] [blame] | 105 | { |
Andre Przywara | bb0db3b | 2023-01-25 12:26:14 +0000 | [diff] [blame] | 106 | return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_FGT); |
Andre Przywara | e8920f6 | 2022-11-10 14:28:01 +0000 | [diff] [blame] | 107 | } |
| 108 | |
| 109 | static inline bool is_feat_fgt_supported(void) |
| 110 | { |
| 111 | if (ENABLE_FEAT_FGT == FEAT_STATE_DISABLED) { |
| 112 | return false; |
| 113 | } |
| 114 | |
| 115 | if (ENABLE_FEAT_FGT == FEAT_STATE_ALWAYS) { |
| 116 | return true; |
| 117 | } |
| 118 | |
| 119 | return read_feat_fgt_id_field() != 0U; |
Jimmy Brisson | ecc3c67 | 2020-04-16 10:47:56 -0500 | [diff] [blame] | 120 | } |
| 121 | |
Jimmy Brisson | 8357389 | 2020-04-16 10:48:02 -0500 | [diff] [blame] | 122 | static inline unsigned long int get_armv8_6_ecv_support(void) |
| 123 | { |
| 124 | return ((read_id_aa64mmfr0_el1() >> ID_AA64MMFR0_EL1_ECV_SHIFT) & |
| 125 | ID_AA64MMFR0_EL1_ECV_MASK); |
| 126 | } |
| 127 | |
Tomas Pilar | 6fd816e | 2020-10-28 15:34:12 +0000 | [diff] [blame] | 128 | static inline bool is_armv8_5_rng_present(void) |
| 129 | { |
| 130 | return ((read_id_aa64isar0_el1() >> ID_AA64ISAR0_RNDR_SHIFT) & |
| 131 | ID_AA64ISAR0_RNDR_MASK); |
| 132 | } |
| 133 | |
Andre Przywara | 2c550e3 | 2022-11-10 14:41:07 +0000 | [diff] [blame] | 134 | /******************************************************************************* |
| 135 | * Functions to identify the presence of the Activity Monitors Extension |
| 136 | ******************************************************************************/ |
| 137 | static unsigned int read_feat_amu_id_field(void) |
| 138 | { |
Andre Przywara | bb0db3b | 2023-01-25 12:26:14 +0000 | [diff] [blame] | 139 | return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_AMU); |
Andre Przywara | 2c550e3 | 2022-11-10 14:41:07 +0000 | [diff] [blame] | 140 | } |
| 141 | |
| 142 | static inline bool is_feat_amu_supported(void) |
| 143 | { |
| 144 | if (ENABLE_FEAT_AMUv1 == FEAT_STATE_DISABLED) { |
| 145 | return false; |
| 146 | } |
| 147 | |
| 148 | if (ENABLE_FEAT_AMUv1 == FEAT_STATE_ALWAYS) { |
| 149 | return true; |
| 150 | } |
| 151 | |
| 152 | return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1; |
| 153 | } |
| 154 | |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 155 | static inline bool is_armv8_6_feat_amuv1p1_present(void) |
| 156 | { |
Andre Przywara | 2c550e3 | 2022-11-10 14:41:07 +0000 | [diff] [blame] | 157 | return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1P1; |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 158 | } |
| 159 | |
Alexei Fedorov | 1993355 | 2020-05-26 13:16:41 +0100 | [diff] [blame] | 160 | /* |
| 161 | * Return MPAM version: |
| 162 | * |
| 163 | * 0x00: None Armv8.0 or later |
| 164 | * 0x01: v0.1 Armv8.4 or later |
| 165 | * 0x10: v1.0 Armv8.2 or later |
| 166 | * 0x11: v1.1 Armv8.4 or later |
| 167 | * |
| 168 | */ |
| 169 | static inline unsigned int get_mpam_version(void) |
| 170 | { |
| 171 | return (unsigned int)((((read_id_aa64pfr0_el1() >> |
| 172 | ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) | |
| 173 | ((read_id_aa64pfr1_el1() >> |
| 174 | ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK)); |
| 175 | } |
| 176 | |
Andre Przywara | f20ad90 | 2022-11-15 11:45:19 +0000 | [diff] [blame] | 177 | static inline unsigned int read_feat_hcx_id_field(void) |
| 178 | { |
Andre Przywara | bb0db3b | 2023-01-25 12:26:14 +0000 | [diff] [blame] | 179 | return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_HCX); |
Andre Przywara | f20ad90 | 2022-11-15 11:45:19 +0000 | [diff] [blame] | 180 | } |
| 181 | |
| 182 | static inline bool is_feat_hcx_supported(void) |
johpow01 | f91e59f | 2021-08-04 19:38:18 -0500 | [diff] [blame] | 183 | { |
Andre Przywara | f20ad90 | 2022-11-15 11:45:19 +0000 | [diff] [blame] | 184 | if (ENABLE_FEAT_HCX == FEAT_STATE_DISABLED) { |
| 185 | return false; |
| 186 | } |
| 187 | |
| 188 | if (ENABLE_FEAT_HCX == FEAT_STATE_ALWAYS) { |
| 189 | return true; |
| 190 | } |
| 191 | |
| 192 | return read_feat_hcx_id_field() != 0U; |
johpow01 | f91e59f | 2021-08-04 19:38:18 -0500 | [diff] [blame] | 193 | } |
| 194 | |
Juan Pablo Conde | 42305f2 | 2022-07-12 16:40:29 -0400 | [diff] [blame] | 195 | static inline bool is_feat_rng_trap_present(void) |
| 196 | { |
| 197 | return (((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT) & |
| 198 | ID_AA64PFR1_EL1_RNDR_TRAP_MASK) |
| 199 | == ID_AA64PFR1_EL1_RNG_TRAP_SUPPORTED); |
| 200 | } |
| 201 | |
Zelalem Aweke | 79e3d29 | 2021-07-08 16:51:14 -0500 | [diff] [blame] | 202 | static inline unsigned int get_armv9_2_feat_rme_support(void) |
| 203 | { |
| 204 | /* |
| 205 | * Return the RME version, zero if not supported. This function can be |
| 206 | * used as both an integer value for the RME version or compared to zero |
| 207 | * to detect RME presence. |
| 208 | */ |
| 209 | return (unsigned int)(read_id_aa64pfr0_el1() >> |
| 210 | ID_AA64PFR0_FEAT_RME_SHIFT) & ID_AA64PFR0_FEAT_RME_MASK; |
| 211 | } |
| 212 | |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 213 | /********************************************************************************* |
| 214 | * Function to identify the presence of FEAT_SB (Speculation Barrier Instruction) |
| 215 | ********************************************************************************/ |
| 216 | static inline bool is_armv8_0_feat_sb_present(void) |
| 217 | { |
| 218 | return (((read_id_aa64isar1_el1() >> ID_AA64ISAR1_SB_SHIFT) & |
| 219 | ID_AA64ISAR1_SB_MASK) == ID_AA64ISAR1_SB_SUPPORTED); |
| 220 | } |
| 221 | |
| 222 | /********************************************************************************* |
| 223 | * Function to identify the presence of FEAT_CSV2_2 (Cache Speculation Variant 2) |
| 224 | ********************************************************************************/ |
| 225 | static inline bool is_armv8_0_feat_csv2_2_present(void) |
| 226 | { |
| 227 | return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_CSV2_SHIFT) & |
| 228 | ID_AA64PFR0_CSV2_MASK) == ID_AA64PFR0_CSV2_2_SUPPORTED); |
| 229 | } |
| 230 | |
| 231 | /********************************************************************************** |
| 232 | * Function to identify the presence of FEAT_SPE (Statistical Profiling Extension) |
| 233 | *********************************************************************************/ |
| 234 | static inline bool is_armv8_2_feat_spe_present(void) |
| 235 | { |
| 236 | return (((read_id_aa64dfr0_el1() >> ID_AA64DFR0_PMS_SHIFT) & |
| 237 | ID_AA64DFR0_PMS_MASK) != ID_AA64DFR0_SPE_NOT_SUPPORTED); |
| 238 | } |
| 239 | |
| 240 | /******************************************************************************* |
| 241 | * Function to identify the presence of FEAT_SVE (Scalable Vector Extension) |
| 242 | ******************************************************************************/ |
| 243 | static inline bool is_armv8_2_feat_sve_present(void) |
| 244 | { |
| 245 | return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SVE_SHIFT) & |
| 246 | ID_AA64PFR0_SVE_MASK) == ID_AA64PFR0_SVE_SUPPORTED); |
| 247 | } |
| 248 | |
| 249 | /******************************************************************************* |
| 250 | * Function to identify the presence of FEAT_RAS (Reliability,Availability, |
| 251 | * and Serviceability Extension) |
| 252 | ******************************************************************************/ |
| 253 | static inline bool is_armv8_2_feat_ras_present(void) |
| 254 | { |
| 255 | return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_RAS_SHIFT) & |
| 256 | ID_AA64PFR0_RAS_MASK) != ID_AA64PFR0_RAS_NOT_SUPPORTED); |
| 257 | } |
| 258 | |
| 259 | /************************************************************************** |
| 260 | * Function to identify the presence of FEAT_DIT (Data Independent Timing) |
| 261 | *************************************************************************/ |
| 262 | static inline bool is_armv8_4_feat_dit_present(void) |
| 263 | { |
| 264 | return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) & |
| 265 | ID_AA64PFR0_DIT_MASK) == ID_AA64PFR0_DIT_SUPPORTED); |
| 266 | } |
| 267 | |
| 268 | /************************************************************************* |
| 269 | * Function to identify the presence of FEAT_TRF (TraceLift) |
| 270 | ************************************************************************/ |
Andre Przywara | 06ea44e | 2022-11-17 17:30:43 +0000 | [diff] [blame] | 271 | static inline unsigned int read_feat_trf_id_field(void) |
| 272 | { |
| 273 | return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEFILT); |
| 274 | } |
| 275 | |
| 276 | static inline bool is_feat_trf_supported(void) |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 277 | { |
Andre Przywara | 06ea44e | 2022-11-17 17:30:43 +0000 | [diff] [blame] | 278 | if (ENABLE_TRF_FOR_NS == FEAT_STATE_DISABLED) { |
| 279 | return false; |
| 280 | } |
| 281 | |
| 282 | if (ENABLE_TRF_FOR_NS == FEAT_STATE_ALWAYS) { |
| 283 | return true; |
| 284 | } |
| 285 | |
| 286 | return read_feat_trf_id_field() != 0U; |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 287 | } |
| 288 | |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 289 | /******************************************************************************** |
| 290 | * Function to identify the presence of FEAT_NV2 (Enhanced Nested Virtualization |
| 291 | * Support) |
| 292 | *******************************************************************************/ |
| 293 | static inline unsigned int get_armv8_4_feat_nv_support(void) |
| 294 | { |
| 295 | return (((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_NV_SHIFT) & |
| 296 | ID_AA64MMFR2_EL1_NV_MASK)); |
| 297 | } |
| 298 | |
Jayanth Dodderi Chidanand | 6931675 | 2022-05-09 12:33:03 +0100 | [diff] [blame] | 299 | /******************************************************************************* |
| 300 | * Function to identify the presence of FEAT_BRBE (Branch Record Buffer |
| 301 | * Extension) |
| 302 | ******************************************************************************/ |
Andre Przywara | c97c551 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 303 | static inline unsigned int read_feat_brbe_id_field(void) |
| 304 | { |
| 305 | return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_BRBE); |
| 306 | } |
| 307 | |
| 308 | static inline bool is_feat_brbe_supported(void) |
Jayanth Dodderi Chidanand | 6931675 | 2022-05-09 12:33:03 +0100 | [diff] [blame] | 309 | { |
Andre Przywara | c97c551 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 310 | if (ENABLE_BRBE_FOR_NS == FEAT_STATE_DISABLED) { |
| 311 | return false; |
| 312 | } |
| 313 | |
| 314 | if (ENABLE_BRBE_FOR_NS == FEAT_STATE_ALWAYS) { |
| 315 | return true; |
| 316 | } |
| 317 | |
| 318 | return read_feat_brbe_id_field() != 0U; |
Jayanth Dodderi Chidanand | 6931675 | 2022-05-09 12:33:03 +0100 | [diff] [blame] | 319 | } |
| 320 | |
Jayanth Dodderi Chidanand | a793ccc | 2022-05-19 14:08:28 +0100 | [diff] [blame] | 321 | /******************************************************************************* |
| 322 | * Function to identify the presence of FEAT_TRBE (Trace Buffer Extension) |
| 323 | ******************************************************************************/ |
Andre Przywara | 191eff6 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 324 | static inline unsigned int read_feat_trbe_id_field(void) |
Jayanth Dodderi Chidanand | a793ccc | 2022-05-19 14:08:28 +0100 | [diff] [blame] | 325 | { |
Andre Przywara | 191eff6 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 326 | return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEBUFFER); |
Jayanth Dodderi Chidanand | a793ccc | 2022-05-19 14:08:28 +0100 | [diff] [blame] | 327 | } |
Jayanth Dodderi Chidanand | 6931675 | 2022-05-09 12:33:03 +0100 | [diff] [blame] | 328 | |
Andre Przywara | 191eff6 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 329 | static inline bool is_feat_trbe_supported(void) |
| 330 | { |
| 331 | if (ENABLE_TRBE_FOR_NS == FEAT_STATE_DISABLED) { |
| 332 | return false; |
| 333 | } |
| 334 | |
| 335 | if (ENABLE_TRBE_FOR_NS == FEAT_STATE_ALWAYS) { |
| 336 | return true; |
| 337 | } |
| 338 | |
| 339 | return read_feat_trbe_id_field() != 0U; |
| 340 | |
| 341 | } |
Antonio Nino Diaz | c326c34 | 2019-01-11 11:20:10 +0000 | [diff] [blame] | 342 | #endif /* ARCH_FEATURES_H */ |