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Antonio Nino Diaz3c817f42018-03-21 10:49:27 +00001/*
2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef SMCCC_HELPERS_H
8#define SMCCC_HELPERS_H
Antonio Nino Diaz3c817f42018-03-21 10:49:27 +00009
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010#include <lib/smccc.h>
Antonio Nino Diaz3c817f42018-03-21 10:49:27 +000011
Julius Werner53456fc2019-07-09 13:49:11 -070012#ifndef __ASSEMBLER__
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000013
Antonio Nino Diazf0b14cf2018-10-04 09:55:23 +010014#include <stdbool.h>
Antonio Nino Diaz3c817f42018-03-21 10:49:27 +000015
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000016#include <context.h>
17
Antonio Nino Diaz3c817f42018-03-21 10:49:27 +000018/* Convenience macros to return from SMC handler */
19#define SMC_RET0(_h) { \
20 return (uint64_t) (_h); \
21}
22#define SMC_RET1(_h, _x0) { \
23 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X0), (_x0)); \
24 SMC_RET0(_h); \
25}
26#define SMC_RET2(_h, _x0, _x1) { \
27 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X1), (_x1)); \
28 SMC_RET1(_h, (_x0)); \
29}
30#define SMC_RET3(_h, _x0, _x1, _x2) { \
31 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X2), (_x2)); \
32 SMC_RET2(_h, (_x0), (_x1)); \
33}
34#define SMC_RET4(_h, _x0, _x1, _x2, _x3) { \
35 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X3), (_x3)); \
36 SMC_RET3(_h, (_x0), (_x1), (_x2)); \
37}
38#define SMC_RET5(_h, _x0, _x1, _x2, _x3, _x4) { \
39 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X4), (_x4)); \
40 SMC_RET4(_h, (_x0), (_x1), (_x2), (_x3)); \
41}
42#define SMC_RET6(_h, _x0, _x1, _x2, _x3, _x4, _x5) { \
43 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X5), (_x5)); \
44 SMC_RET5(_h, (_x0), (_x1), (_x2), (_x3), (_x4)); \
45}
46#define SMC_RET7(_h, _x0, _x1, _x2, _x3, _x4, _x5, _x6) { \
47 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X6), (_x6)); \
48 SMC_RET6(_h, (_x0), (_x1), (_x2), (_x3), (_x4), (_x5)); \
49}
50#define SMC_RET8(_h, _x0, _x1, _x2, _x3, _x4, _x5, _x6, _x7) { \
51 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X7), (_x7)); \
52 SMC_RET7(_h, (_x0), (_x1), (_x2), (_x3), (_x4), (_x5), (_x6)); \
53}
54
55/*
56 * Convenience macros to access general purpose registers using handle provided
57 * to SMC handler. These take the offset values defined in context.h
58 */
59#define SMC_GET_GP(_h, _g) \
60 read_ctx_reg((get_gpregs_ctx(_h)), (_g))
61#define SMC_SET_GP(_h, _g, _v) \
62 write_ctx_reg((get_gpregs_ctx(_h)), (_g), (_v))
63
64/*
65 * Convenience macros to access EL3 context registers using handle provided to
66 * SMC handler. These take the offset values defined in context.h
67 */
68#define SMC_GET_EL3(_h, _e) \
69 read_ctx_reg((get_el3state_ctx(_h)), (_e))
70#define SMC_SET_EL3(_h, _e, _v) \
71 write_ctx_reg((get_el3state_ctx(_h)), (_e), (_v))
72
Antonio Nino Diaz3c817f42018-03-21 10:49:27 +000073/*
74 * Helper macro to retrieve the SMC parameters from cpu_context_t.
75 */
76#define get_smc_params_from_ctx(_hdl, _x1, _x2, _x3, _x4) \
77 do { \
78 const gp_regs_t *regs = get_gpregs_ctx(_hdl); \
79 _x1 = read_ctx_reg(regs, CTX_GPREG_X1); \
80 _x2 = read_ctx_reg(regs, CTX_GPREG_X2); \
81 _x3 = read_ctx_reg(regs, CTX_GPREG_X3); \
82 _x4 = read_ctx_reg(regs, CTX_GPREG_X4); \
Antonio Nino Diazf0b14cf2018-10-04 09:55:23 +010083 } while (false)
Antonio Nino Diaz3c817f42018-03-21 10:49:27 +000084
Julius Werner53456fc2019-07-09 13:49:11 -070085#endif /*__ASSEMBLER__*/
Antonio Nino Diaz3c817f42018-03-21 10:49:27 +000086
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000087#endif /* SMCCC_HELPERS_H */