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Tony Xief6118cc2016-01-15 17:17:32 +08001/*
2 * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef __PLAT_PRIVATE_H__
32#define __PLAT_PRIVATE_H__
33
34#ifndef __ASSEMBLY__
35#include <mmio.h>
36#include <stdint.h>
37#include <xlat_tables.h>
Tony Xie42e113e2016-07-16 11:16:51 +080038#include <psci.h>
Tony Xief6118cc2016-01-15 17:17:32 +080039
40/******************************************************************************
41 * For rockchip socs pm ops
42 ******************************************************************************/
43struct rockchip_pm_ops_cb {
44 int (*cores_pwr_dm_on)(unsigned long mpidr, uint64_t entrypoint);
45 int (*cores_pwr_dm_off)(void);
46 int (*cores_pwr_dm_on_finish)(void);
47 int (*cores_pwr_dm_suspend)(void);
48 int (*cores_pwr_dm_resume)(void);
Tony Xie42e113e2016-07-16 11:16:51 +080049 /* hlvl is used for clusters or system level */
50 int (*hlvl_pwr_dm_suspend)(uint32_t lvl, plat_local_state_t lvl_state);
51 int (*hlvl_pwr_dm_resume)(uint32_t lvl, plat_local_state_t lvl_state);
52 int (*hlvl_pwr_dm_off)(uint32_t lvl, plat_local_state_t lvl_state);
53 int (*hlvl_pwr_dm_on_finish)(uint32_t lvl,
54 plat_local_state_t lvl_state);
Tony Xief6118cc2016-01-15 17:17:32 +080055 int (*sys_pwr_dm_suspend)(void);
56 int (*sys_pwr_dm_resume)(void);
57 void (*sys_gbl_soft_reset)(void) __dead2;
58 void (*system_off)(void) __dead2;
Caesar Wange67b1de2016-08-17 17:22:10 -070059 void (*sys_pwr_down_wfi)(const psci_power_state_t *state_info) __dead2;
Tony Xief6118cc2016-01-15 17:17:32 +080060};
61
62/******************************************************************************
63 * The register have write-mask bits, it is mean, if you want to set the bits,
64 * you needs set the write-mask bits at the same time,
65 * The write-mask bits is in high 16-bits.
66 * The fllowing macro definition helps access write-mask bits reg efficient!
67 ******************************************************************************/
68#define REG_MSK_SHIFT 16
69
70#ifndef BIT
71#define BIT(nr) (1 << (nr))
72#endif
73
74#ifndef WMSK_BIT
75#define WMSK_BIT(nr) BIT((nr) + REG_MSK_SHIFT)
76#endif
77
78/* set one bit with write mask */
79#ifndef BIT_WITH_WMSK
80#define BIT_WITH_WMSK(nr) (BIT(nr) | WMSK_BIT(nr))
81#endif
82
83#ifndef BITS_SHIFT
84#define BITS_SHIFT(bits, shift) (bits << (shift))
85#endif
86
87#ifndef BITS_WITH_WMASK
Caesar Wang59e41b52016-04-10 14:11:07 +080088#define BITS_WITH_WMASK(bits, msk, shift)\
Tony Xief6118cc2016-01-15 17:17:32 +080089 (BITS_SHIFT(bits, shift) | BITS_SHIFT(msk, (shift + REG_MSK_SHIFT)))
90#endif
91
92/******************************************************************************
93 * Function and variable prototypes
94 *****************************************************************************/
95void plat_configure_mmu_el3(unsigned long total_base,
96 unsigned long total_size,
97 unsigned long,
98 unsigned long,
99 unsigned long,
100 unsigned long);
101
102void plat_cci_init(void);
103void plat_cci_enable(void);
104void plat_cci_disable(void);
105
106void plat_delay_timer_init(void);
107
Caesar Wang3e3c5b02016-05-25 19:03:04 +0800108void params_early_setup(void *plat_params_from_bl2);
109
Tony Xief6118cc2016-01-15 17:17:32 +0800110void plat_rockchip_gic_driver_init(void);
111void plat_rockchip_gic_init(void);
112void plat_rockchip_gic_cpuif_enable(void);
113void plat_rockchip_gic_cpuif_disable(void);
114void plat_rockchip_gic_pcpu_init(void);
115
116void plat_rockchip_pmusram_prepare(void);
117void plat_rockchip_pmu_init(void);
118void plat_rockchip_soc_init(void);
119void plat_setup_rockchip_pm_ops(struct rockchip_pm_ops_cb *ops);
Tony Xie42e113e2016-07-16 11:16:51 +0800120uintptr_t plat_get_sec_entrypoint(void);
Tony Xief6118cc2016-01-15 17:17:32 +0800121
Caesar Wang59e41b52016-04-10 14:11:07 +0800122void platform_cpu_warmboot(void);
123
Caesar Wang3e3c5b02016-05-25 19:03:04 +0800124void *plat_get_rockchip_gpio_reset(void);
125void *plat_get_rockchip_gpio_poweroff(void);
Caesar Wang038f6aa2016-05-25 19:21:43 +0800126void plat_rockchip_gpio_init(void);
127
Tony Xief6118cc2016-01-15 17:17:32 +0800128extern const unsigned char rockchip_power_domain_tree_desc[];
129
130extern void *pmu_cpuson_entrypoint_start;
131extern void *pmu_cpuson_entrypoint_end;
132extern uint64_t cpuson_entry_point[PLATFORM_CORE_COUNT];
133extern uint32_t cpuson_flags[PLATFORM_CORE_COUNT];
134
135extern const mmap_region_t plat_rk_mmap[];
136#endif /* __ASSEMBLY__ */
137
Tony Xie42e113e2016-07-16 11:16:51 +0800138/******************************************************************************
139 * cpu up status
140 * The bits of macro value is not more than 12 bits for cmp instruction!
141 ******************************************************************************/
142#define PMU_CPU_HOTPLUG 0xf00
143#define PMU_CPU_AUTO_PWRDN 0xf0
144#define PMU_CLST_RET 0xa5
Tony Xief6118cc2016-01-15 17:17:32 +0800145
146#endif /* __PLAT_PRIVATE_H__ */