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Varun Wadekar921b9062015-08-25 17:03:14 +05301#
2# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are met:
6#
7# Redistributions of source code must retain the above copyright notice, this
8# list of conditions and the following disclaimer.
9#
10# Redistributions in binary form must reproduce the above copyright notice,
11# this list of conditions and the following disclaimer in the documentation
12# and/or other materials provided with the distribution.
13#
14# Neither the name of ARM nor the names of its contributors may be used
15# to endorse or promote products derived from this software without specific
16# prior written permission.
17#
18# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28# POSSIBILITY OF SUCH DAMAGE.
29#
30
31# platform configs
32ENABLE_NS_L2_CPUECTRL_RW_ACCESS := 1
33$(eval $(call add_define,ENABLE_NS_L2_CPUECTRL_RW_ACCESS))
34
35# platform settings
Varun Wadekar94d85322015-11-30 12:05:04 -080036TZDRAM_BASE := 0x30000000
Varun Wadekar921b9062015-08-25 17:03:14 +053037$(eval $(call add_define,TZDRAM_BASE))
38
39PLATFORM_CLUSTER_COUNT := 2
40$(eval $(call add_define,PLATFORM_CLUSTER_COUNT))
41
42PLATFORM_MAX_CPUS_PER_CLUSTER := 4
43$(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER))
44
Varun Wadekare60f1bf2016-02-17 10:10:50 -080045MAX_XLAT_TABLES := 12
Varun Wadekar921b9062015-08-25 17:03:14 +053046$(eval $(call add_define,MAX_XLAT_TABLES))
47
Varun Wadekare60f1bf2016-02-17 10:10:50 -080048MAX_MMAP_REGIONS := 12
Varun Wadekar921b9062015-08-25 17:03:14 +053049$(eval $(call add_define,MAX_MMAP_REGIONS))
50
51# platform files
52PLAT_INCLUDES += -I${SOC_DIR}/drivers/include
53
54BL31_SOURCES += lib/cpus/aarch64/denver.S \
55 lib/cpus/aarch64/cortex_a57.S \
56 ${COMMON_DIR}/drivers/memctrl/memctrl_v2.c \
Varun Wadekara0352ab2017-03-14 14:24:35 -070057 ${SOC_DIR}/drivers/mce/mce.c \
58 ${SOC_DIR}/drivers/mce/ari.c \
59 ${SOC_DIR}/drivers/mce/nvg.c \
60 ${SOC_DIR}/drivers/mce/aarch64/nvg_helpers.S \
Varun Wadekar921b9062015-08-25 17:03:14 +053061 ${SOC_DIR}/plat_psci_handlers.c \
62 ${SOC_DIR}/plat_setup.c \
63 ${SOC_DIR}/plat_secondary.c \
64 ${SOC_DIR}/plat_sip_calls.c