Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch_helpers.h> |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 8 | #include <assert.h> |
| 9 | #include <bl_common.h> |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 10 | #include <context.h> |
| 11 | #include <context_mgmt.h> |
| 12 | #include <debug.h> |
| 13 | #include <dt-bindings/clock/stm32mp1-clks.h> |
| 14 | #include <generic_delay_timer.h> |
| 15 | #include <mmio.h> |
| 16 | #include <platform.h> |
| 17 | #include <platform_def.h> |
| 18 | #include <platform_sp_min.h> |
Yann Gautier | 8593e44 | 2018-11-14 18:46:15 +0100 | [diff] [blame] | 19 | #include <stm32_console.h> |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 20 | #include <stm32mp1_clk.h> |
| 21 | #include <stm32mp1_dt.h> |
| 22 | #include <stm32mp1_private.h> |
| 23 | #include <string.h> |
| 24 | #include <tzc400.h> |
| 25 | #include <xlat_tables_v2.h> |
| 26 | |
| 27 | /****************************************************************************** |
| 28 | * Placeholder variables for copying the arguments that have been passed to |
| 29 | * BL32 from BL2. |
| 30 | ******************************************************************************/ |
| 31 | static entry_point_info_t bl33_image_ep_info; |
| 32 | |
Yann Gautier | 8593e44 | 2018-11-14 18:46:15 +0100 | [diff] [blame] | 33 | static struct console_stm32 console; |
| 34 | |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 35 | /******************************************************************************* |
| 36 | * Interrupt handler for FIQ (secure IRQ) |
| 37 | ******************************************************************************/ |
| 38 | void sp_min_plat_fiq_handler(uint32_t id) |
| 39 | { |
| 40 | switch (id) { |
| 41 | case STM32MP1_IRQ_TZC400: |
| 42 | ERROR("STM32MP1_IRQ_TZC400 generated\n"); |
| 43 | panic(); |
| 44 | break; |
| 45 | case STM32MP1_IRQ_AXIERRIRQ: |
| 46 | ERROR("STM32MP1_IRQ_AXIERRIRQ generated\n"); |
| 47 | panic(); |
| 48 | break; |
| 49 | default: |
| 50 | ERROR("SECURE IT handler not define for it : %i", id); |
| 51 | break; |
| 52 | } |
| 53 | } |
| 54 | |
| 55 | /******************************************************************************* |
| 56 | * Return a pointer to the 'entry_point_info' structure of the next image for |
| 57 | * the security state specified. BL33 corresponds to the non-secure image type |
| 58 | * while BL32 corresponds to the secure image type. A NULL pointer is returned |
| 59 | * if the image does not exist. |
| 60 | ******************************************************************************/ |
| 61 | entry_point_info_t *sp_min_plat_get_bl33_ep_info(void) |
| 62 | { |
| 63 | entry_point_info_t *next_image_info; |
| 64 | |
| 65 | next_image_info = &bl33_image_ep_info; |
| 66 | |
| 67 | if (next_image_info->pc == 0U) { |
| 68 | return NULL; |
| 69 | } |
| 70 | |
| 71 | return next_image_info; |
| 72 | } |
| 73 | |
| 74 | /******************************************************************************* |
| 75 | * Perform any BL32 specific platform actions. |
| 76 | ******************************************************************************/ |
| 77 | void sp_min_early_platform_setup2(u_register_t arg0, u_register_t arg1, |
| 78 | u_register_t arg2, u_register_t arg3) |
| 79 | { |
| 80 | struct dt_node_info dt_dev_info; |
| 81 | int result; |
| 82 | bl_params_t *params_from_bl2 = (bl_params_t *)arg0; |
| 83 | |
| 84 | /* Imprecise aborts can be masked in NonSecure */ |
| 85 | write_scr(read_scr() | SCR_AW_BIT); |
| 86 | |
| 87 | assert(params_from_bl2 != NULL); |
| 88 | assert(params_from_bl2->h.type == PARAM_BL_PARAMS); |
| 89 | assert(params_from_bl2->h.version >= VERSION_2); |
| 90 | |
| 91 | bl_params_node_t *bl_params = params_from_bl2->head; |
| 92 | |
| 93 | /* |
| 94 | * Copy BL33 entry point information. |
| 95 | * They are stored in Secure RAM, in BL2's address space. |
| 96 | */ |
| 97 | while (bl_params != NULL) { |
| 98 | if (bl_params->image_id == BL33_IMAGE_ID) { |
| 99 | bl33_image_ep_info = *bl_params->ep_info; |
| 100 | break; |
| 101 | } |
| 102 | |
| 103 | bl_params = bl_params->next_params_info; |
| 104 | } |
| 105 | |
| 106 | if (dt_open_and_check() < 0) { |
| 107 | panic(); |
| 108 | } |
| 109 | |
| 110 | if (stm32mp1_clk_probe() < 0) { |
| 111 | panic(); |
| 112 | } |
| 113 | |
| 114 | result = dt_get_stdout_uart_info(&dt_dev_info); |
| 115 | |
| 116 | if ((result > 0) && dt_dev_info.status) { |
Yann Gautier | 8593e44 | 2018-11-14 18:46:15 +0100 | [diff] [blame] | 117 | if (console_stm32_register(dt_dev_info.base, 0, |
| 118 | STM32MP1_UART_BAUDRATE, &console) == |
| 119 | 0) { |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 120 | panic(); |
| 121 | } |
| 122 | } |
| 123 | } |
| 124 | |
| 125 | /******************************************************************************* |
| 126 | * Initialize the MMU, security and the GIC. |
| 127 | ******************************************************************************/ |
| 128 | void sp_min_platform_setup(void) |
| 129 | { |
| 130 | mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, |
| 131 | BL_CODE_END - BL_CODE_BASE, |
| 132 | MT_CODE | MT_SECURE); |
| 133 | |
| 134 | configure_mmu(); |
| 135 | |
| 136 | /* Initialize tzc400 after DDR initialization */ |
| 137 | stm32mp1_security_setup(); |
| 138 | |
| 139 | generic_delay_timer_init(); |
| 140 | |
| 141 | stm32mp1_gic_init(); |
| 142 | } |
| 143 | |
| 144 | void sp_min_plat_arch_setup(void) |
| 145 | { |
| 146 | } |