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Dan Handley9df48042015-03-19 18:58:55 +00001/*
2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30#ifndef __PLAT_ARM_H__
31#define __PLAT_ARM_H__
32
33#include <bakery_lock.h>
34#include <bl_common.h>
35#include <cassert.h>
36#include <cpu_data.h>
37#include <stdint.h>
38
39
40/*
41 * Extern declarations common to ARM standard platforms
42 */
43extern const mmap_region_t plat_arm_mmap[];
44
45#define ARM_CASSERT_MMAP \
46 CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \
47 <= MAX_MMAP_REGIONS, \
48 assert_max_mmap_regions);
49
50/*
51 * Utility functions common to ARM standard platforms
52 */
53
54void arm_configure_mmu_el1(unsigned long total_base,
55 unsigned long total_size,
56 unsigned long ro_start,
57 unsigned long ro_limit
58#if USE_COHERENT_MEM
59 , unsigned long coh_start,
60 unsigned long coh_limit
61#endif
62);
63void arm_configure_mmu_el3(unsigned long total_base,
64 unsigned long total_size,
65 unsigned long ro_start,
66 unsigned long ro_limit
67#if USE_COHERENT_MEM
68 , unsigned long coh_start,
69 unsigned long coh_limit
70#endif
71);
72
73#if IMAGE_BL31
74#if USE_COHERENT_MEM
75
76/*
77 * Use this macro to instantiate lock before it is used in below
78 * arm_lock_xxx() macros
79 */
80#define ARM_INSTANTIATE_LOCK bakery_lock_t arm_lock \
81 __attribute__ ((section("tzfw_coherent_mem")));
82
83/*
84 * These are wrapper macros to the Coherent Memory Bakery Lock API.
85 */
86#define arm_lock_init() bakery_lock_init(&arm_lock)
87#define arm_lock_get() bakery_lock_get(&arm_lock)
88#define arm_lock_release() bakery_lock_release(&arm_lock)
89
90#else
91
92/*******************************************************************************
93 * Constants to specify how many bakery locks this platform implements. These
94 * are used if the platform chooses not to use coherent memory for bakery lock
95 * data structures.
96 ******************************************************************************/
97#define ARM_MAX_BAKERIES 1
98#define ARM_PWRC_BAKERY_ID 0
99
100/* Empty definition */
101#define ARM_INSTANTIATE_LOCK
102
103/*******************************************************************************
104 * Definition of structure which holds platform specific per-cpu data. Currently
105 * it holds only the bakery lock information for each cpu.
106 ******************************************************************************/
107typedef struct arm_cpu_data {
108 bakery_info_t pcpu_bakery_info[ARM_MAX_BAKERIES];
109} arm_cpu_data_t;
110
111/* Macro to define the offset of bakery_info_t in arm_cpu_data_t */
112#define ARM_CPU_DATA_LOCK_OFFSET __builtin_offsetof\
113 (arm_cpu_data_t, pcpu_bakery_info)
114
115
116/*******************************************************************************
117 * Helper macros for bakery lock api when using the above arm_cpu_data_t for
118 * bakery lock data structures. It assumes that the bakery_info is at the
119 * beginning of the platform specific per-cpu data.
120 ******************************************************************************/
121#define arm_lock_init() /* No init required */
122#define arm_lock_get() bakery_lock_get(ARM_PWRC_BAKERY_ID, \
123 CPU_DATA_PLAT_PCPU_OFFSET + \
124 ARM_CPU_DATA_LOCK_OFFSET)
125#define arm_lock_release() bakery_lock_release(ARM_PWRC_BAKERY_ID, \
126 CPU_DATA_PLAT_PCPU_OFFSET + \
127 ARM_CPU_DATA_LOCK_OFFSET)
128
129/*
130 * Ensure that the size of the platform specific per-cpu data structure and
131 * the size of the memory allocated in generic per-cpu data for the platform
132 * are the same.
133 */
134CASSERT(PLAT_PCPU_DATA_SIZE == sizeof(arm_cpu_data_t),
135 arm_pcpu_data_size_mismatch);
136
137#endif /* USE_COHERENT_MEM */
138
139#else
140
141/*
142* Dummy macros for all other BL stages other than BL3-1
143*/
144#define ARM_INSTANTIATE_LOCK
145#define arm_lock_init()
146#define arm_lock_get()
147#define arm_lock_release()
148
149#endif /* IMAGE_BL31 */
150
Soby Mathew7799cf72015-04-16 14:49:09 +0100151#if ARM_RECOM_STATE_ID_ENC
152/*
153 * Macros used to parse state information from State-ID if it is using the
154 * recommended encoding for State-ID.
155 */
156#define ARM_LOCAL_PSTATE_WIDTH 4
157#define ARM_LOCAL_PSTATE_MASK ((1 << ARM_LOCAL_PSTATE_WIDTH) - 1)
158
159/* Macros to construct the composite power state */
160
161/* Make composite power state parameter till power level 0 */
162#if PSCI_EXTENDED_STATE_ID
163
164#define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
165 (((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT))
166#else
167#define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
168 (((lvl0_state) << PSTATE_ID_SHIFT) | \
169 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
170 ((type) << PSTATE_TYPE_SHIFT))
171#endif /* __PSCI_EXTENDED_STATE_ID__ */
172
173/* Make composite power state parameter till power level 1 */
174#define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \
175 (((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \
176 arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
177
178#endif /* __ARM_RECOM_STATE_ID_ENC__ */
179
Dan Handley9df48042015-03-19 18:58:55 +0000180
181/* CCI utility functions */
182void arm_cci_init(void);
183
184/* IO storage utility functions */
185void arm_io_setup(void);
186
187/* Security utility functions */
188void arm_tzc_setup(void);
189
190/* PM utility functions */
Soby Mathewfec4eb72015-07-01 16:16:20 +0100191int arm_validate_power_state(unsigned int power_state,
192 psci_power_state_t *req_state);
Soby Mathew0d9e8522015-07-15 13:36:24 +0100193int arm_validate_ns_entrypoint(uintptr_t entrypoint);
Soby Mathewfec4eb72015-07-01 16:16:20 +0100194
195/* Topology utility function */
196int arm_check_mpidr(u_register_t mpidr);
Dan Handley9df48042015-03-19 18:58:55 +0000197
198/* BL1 utility functions */
199void arm_bl1_early_platform_setup(void);
200void arm_bl1_platform_setup(void);
201void arm_bl1_plat_arch_setup(void);
202
203/* BL2 utility functions */
204void arm_bl2_early_platform_setup(meminfo_t *mem_layout);
205void arm_bl2_platform_setup(void);
206void arm_bl2_plat_arch_setup(void);
207uint32_t arm_get_spsr_for_bl32_entry(void);
208uint32_t arm_get_spsr_for_bl33_entry(void);
209
210/* BL3-1 utility functions */
211void arm_bl31_early_platform_setup(bl31_params_t *from_bl2,
212 void *plat_params_from_bl2);
213void arm_bl31_platform_setup(void);
214void arm_bl31_plat_arch_setup(void);
215
216/* TSP utility functions */
217void arm_tsp_early_platform_setup(void);
218
219
220/*
221 * Mandatory functions required in ARM standard platforms
222 */
223void plat_arm_gic_init(void);
224void plat_arm_security_setup(void);
225void plat_arm_pwrc_setup(void);
226
227/*
228 * Optional functions required in ARM standard platforms
229 */
230void plat_arm_io_setup(void);
231int plat_arm_get_alt_image_source(
Juan Castillo3a66aca2015-04-13 17:36:19 +0100232 unsigned int image_id,
233 uintptr_t *dev_handle,
234 uintptr_t *image_spec);
Soby Mathewfec4eb72015-07-01 16:16:20 +0100235unsigned int plat_arm_calc_core_pos(u_register_t mpidr);
Dan Handley9df48042015-03-19 18:58:55 +0000236
237
238#endif /* __PLAT_ARM_H__ */