| Anson Huang | b629413 | 2018-06-05 16:05:59 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | /*! |
| 8 | * Header file containing types used across multiple service APIs. |
| 9 | */ |
| 10 | |
| Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 11 | #ifndef SCI_TYPES_H |
| 12 | #define SCI_TYPES_H |
| Anson Huang | b629413 | 2018-06-05 16:05:59 +0800 | [diff] [blame] | 13 | |
| 14 | /* Includes */ |
| 15 | |
| 16 | #include <sci/sci_scfw.h> |
| 17 | |
| 18 | /* Defines */ |
| 19 | |
| 20 | /*! |
| 21 | * @name Defines for common frequencies |
| 22 | */ |
| 23 | /*@{*/ |
| 24 | #define SC_32KHZ 32768U /* 32KHz */ |
| 25 | #define SC_10MHZ 10000000U /* 10MHz */ |
| 26 | #define SC_20MHZ 20000000U /* 20MHz */ |
| 27 | #define SC_25MHZ 25000000U /* 25MHz */ |
| 28 | #define SC_27MHZ 27000000U /* 27MHz */ |
| 29 | #define SC_40MHZ 40000000U /* 40MHz */ |
| 30 | #define SC_45MHZ 45000000U /* 45MHz */ |
| 31 | #define SC_50MHZ 50000000U /* 50MHz */ |
| 32 | #define SC_60MHZ 60000000U /* 60MHz */ |
| 33 | #define SC_66MHZ 66666666U /* 66MHz */ |
| 34 | #define SC_74MHZ 74250000U /* 74.25MHz */ |
| 35 | #define SC_80MHZ 80000000U /* 80MHz */ |
| 36 | #define SC_83MHZ 83333333U /* 83MHz */ |
| 37 | #define SC_84MHZ 84375000U /* 84.37MHz */ |
| 38 | #define SC_100MHZ 100000000U /* 100MHz */ |
| 39 | #define SC_125MHZ 125000000U /* 125MHz */ |
| 40 | #define SC_133MHZ 133333333U /* 133MHz */ |
| 41 | #define SC_135MHZ 135000000U /* 135MHz */ |
| 42 | #define SC_150MHZ 150000000U /* 150MHz */ |
| 43 | #define SC_160MHZ 160000000U /* 160MHz */ |
| 44 | #define SC_166MHZ 166666666U /* 166MHz */ |
| 45 | #define SC_175MHZ 175000000U /* 175MHz */ |
| 46 | #define SC_180MHZ 180000000U /* 180MHz */ |
| 47 | #define SC_200MHZ 200000000U /* 200MHz */ |
| 48 | #define SC_250MHZ 250000000U /* 250MHz */ |
| 49 | #define SC_266MHZ 266666666U /* 266MHz */ |
| 50 | #define SC_300MHZ 300000000U /* 300MHz */ |
| 51 | #define SC_312MHZ 312500000U /* 312.5MHZ */ |
| 52 | #define SC_320MHZ 320000000U /* 320MHz */ |
| 53 | #define SC_325MHZ 325000000U /* 325MHz */ |
| 54 | #define SC_333MHZ 333333333U /* 333MHz */ |
| 55 | #define SC_350MHZ 350000000U /* 350MHz */ |
| 56 | #define SC_372MHZ 372000000U /* 372MHz */ |
| 57 | #define SC_375MHZ 375000000U /* 375MHz */ |
| 58 | #define SC_400MHZ 400000000U /* 400MHz */ |
| 59 | #define SC_500MHZ 500000000U /* 500MHz */ |
| 60 | #define SC_594MHZ 594000000U /* 594MHz */ |
| 61 | #define SC_625MHZ 625000000U /* 625MHz */ |
| 62 | #define SC_640MHZ 640000000U /* 640MHz */ |
| 63 | #define SC_650MHZ 650000000U /* 650MHz */ |
| 64 | #define SC_667MHZ 666666667U /* 667MHz */ |
| 65 | #define SC_675MHZ 675000000U /* 675MHz */ |
| 66 | #define SC_700MHZ 700000000U /* 700MHz */ |
| 67 | #define SC_720MHZ 720000000U /* 720MHz */ |
| 68 | #define SC_750MHZ 750000000U /* 750MHz */ |
| 69 | #define SC_800MHZ 800000000U /* 800MHz */ |
| 70 | #define SC_850MHZ 850000000U /* 850MHz */ |
| 71 | #define SC_900MHZ 900000000U /* 900MHz */ |
| 72 | #define SC_1000MHZ 1000000000U /* 1GHz */ |
| 73 | #define SC_1056MHZ 1056000000U /* 1.056GHz */ |
| 74 | #define SC_1188MHZ 1188000000U /* 1.188GHz */ |
| 75 | #define SC_1260MHZ 1260000000U /* 1.26GHz */ |
| 76 | #define SC_1280MHZ 1280000000U /* 1.28GHz */ |
| 77 | #define SC_1300MHZ 1300000000U /* 1.3GHz */ |
| 78 | #define SC_1400MHZ 1400000000U /* 1.4GHz */ |
| 79 | #define SC_1500MHZ 1500000000U /* 1.5GHz */ |
| 80 | #define SC_1600MHZ 1600000000U /* 1.6GHz */ |
| 81 | #define SC_1800MHZ 1800000000U /* 1.8GHz */ |
| 82 | #define SC_2000MHZ 2000000000U /* 2.0GHz */ |
| 83 | #define SC_2112MHZ 2112000000U /* 2.12GHz */ |
| 84 | /*@}*/ |
| 85 | |
| 86 | /*! |
| 87 | * @name Defines for 24M related frequencies |
| 88 | */ |
| 89 | /*@{*/ |
| 90 | #define SC_8MHZ 8000000U /* 8MHz */ |
| 91 | #define SC_12MHZ 12000000U /* 12MHz */ |
| 92 | #define SC_19MHZ 19800000U /* 19.8MHz */ |
| 93 | #define SC_24MHZ 24000000U /* 24MHz */ |
| 94 | #define SC_48MHZ 48000000U /* 48MHz */ |
| 95 | #define SC_120MHZ 120000000U /* 120MHz */ |
| 96 | #define SC_132MHZ 132000000U /* 132MHz */ |
| 97 | #define SC_144MHZ 144000000U /* 144MHz */ |
| 98 | #define SC_192MHZ 192000000U /* 192MHz */ |
| 99 | #define SC_211MHZ 211200000U /* 211.2MHz */ |
| 100 | #define SC_240MHZ 240000000U /* 240MHz */ |
| 101 | #define SC_264MHZ 264000000U /* 264MHz */ |
| 102 | #define SC_352MHZ 352000000U /* 352MHz */ |
| 103 | #define SC_360MHZ 360000000U /* 360MHz */ |
| 104 | #define SC_384MHZ 384000000U /* 384MHz */ |
| 105 | #define SC_396MHZ 396000000U /* 396MHz */ |
| 106 | #define SC_432MHZ 432000000U /* 432MHz */ |
| 107 | #define SC_480MHZ 480000000U /* 480MHz */ |
| 108 | #define SC_600MHZ 600000000U /* 600MHz */ |
| 109 | #define SC_744MHZ 744000000U /* 744MHz */ |
| 110 | #define SC_792MHZ 792000000U /* 792MHz */ |
| 111 | #define SC_864MHZ 864000000U /* 864MHz */ |
| 112 | #define SC_960MHZ 960000000U /* 960MHz */ |
| 113 | #define SC_1056MHZ 1056000000U /* 1056MHz */ |
| 114 | #define SC_1200MHZ 1200000000U /* 1.2GHz */ |
| 115 | #define SC_1464MHZ 1464000000U /* 1.464GHz */ |
| 116 | #define SC_2400MHZ 2400000000U /* 2.4GHz */ |
| 117 | /*@}*/ |
| 118 | |
| 119 | /*! |
| 120 | * @name Defines for A/V related frequencies |
| 121 | */ |
| 122 | /*@{*/ |
| 123 | #define SC_62MHZ 62937500U /* 62.9375MHz */ |
| 124 | #define SC_755MHZ 755250000U /* 755.25MHz */ |
| 125 | /*@}*/ |
| 126 | |
| 127 | /*! |
| 128 | * @name Defines for type widths |
| 129 | */ |
| 130 | /*@{*/ |
| 131 | #define SC_FADDR_W 36U /* Width of sc_faddr_t */ |
| 132 | #define SC_BOOL_W 1U /* Width of sc_bool_t */ |
| 133 | #define SC_ERR_W 4U /* Width of sc_err_t */ |
| 134 | #define SC_RSRC_W 10U /* Width of sc_rsrc_t */ |
| 135 | #define SC_CTRL_W 6U /* Width of sc_ctrl_t */ |
| 136 | /*@}*/ |
| 137 | |
| 138 | /*! |
| 139 | * @name Defines for sc_bool_t |
| 140 | */ |
| 141 | /*@{*/ |
| 142 | #define SC_FALSE ((sc_bool_t) 0U) /* True */ |
| 143 | #define SC_TRUE ((sc_bool_t) 1U) /* False */ |
| 144 | /*@}*/ |
| 145 | |
| 146 | /*! |
| 147 | * @name Defines for sc_err_t. |
| 148 | */ |
| 149 | /*@{*/ |
| 150 | #define SC_ERR_NONE 0U /* Success */ |
| 151 | #define SC_ERR_VERSION 1U /* Incompatible API version */ |
| 152 | #define SC_ERR_CONFIG 2U /* Configuration error */ |
| 153 | #define SC_ERR_PARM 3U /* Bad parameter */ |
| 154 | #define SC_ERR_NOACCESS 4U /* Permission error (no access) */ |
| 155 | #define SC_ERR_LOCKED 5U /* Permission error (locked) */ |
| 156 | #define SC_ERR_UNAVAILABLE 6U /* Unavailable (out of resources) */ |
| 157 | #define SC_ERR_NOTFOUND 7U /* Not found */ |
| 158 | #define SC_ERR_NOPOWER 8U /* No power */ |
| 159 | #define SC_ERR_IPC 9U /* Generic IPC error */ |
| 160 | #define SC_ERR_BUSY 10U /* Resource is currently busy/active */ |
| 161 | #define SC_ERR_FAIL 11U /* General I/O failure */ |
| 162 | #define SC_ERR_LAST 12U |
| 163 | /*@}*/ |
| 164 | |
| 165 | /*! |
| 166 | * @name Defines for sc_rsrc_t. |
| 167 | */ |
| 168 | /*@{*/ |
| 169 | #define SC_R_A53 0U |
| 170 | #define SC_R_A53_0 1U |
| 171 | #define SC_R_A53_1 2U |
| 172 | #define SC_R_A53_2 3U |
| 173 | #define SC_R_A53_3 4U |
| 174 | #define SC_R_A72 5U |
| 175 | #define SC_R_A72_0 6U |
| 176 | #define SC_R_A72_1 7U |
| 177 | #define SC_R_A72_2 8U |
| 178 | #define SC_R_A72_3 9U |
| 179 | #define SC_R_CCI 10U |
| 180 | #define SC_R_DB 11U |
| 181 | #define SC_R_DRC_0 12U |
| 182 | #define SC_R_DRC_1 13U |
| 183 | #define SC_R_GIC_SMMU 14U |
| 184 | #define SC_R_IRQSTR_M4_0 15U |
| 185 | #define SC_R_IRQSTR_M4_1 16U |
| 186 | #define SC_R_SMMU 17U |
| 187 | #define SC_R_GIC 18U |
| 188 | #define SC_R_DC_0_BLIT0 19U |
| 189 | #define SC_R_DC_0_BLIT1 20U |
| 190 | #define SC_R_DC_0_BLIT2 21U |
| 191 | #define SC_R_DC_0_BLIT_OUT 22U |
| 192 | #define SC_R_DC_0_CAPTURE0 23U |
| 193 | #define SC_R_DC_0_CAPTURE1 24U |
| 194 | #define SC_R_DC_0_WARP 25U |
| 195 | #define SC_R_DC_0_INTEGRAL0 26U |
| 196 | #define SC_R_DC_0_INTEGRAL1 27U |
| 197 | #define SC_R_DC_0_VIDEO0 28U |
| 198 | #define SC_R_DC_0_VIDEO1 29U |
| 199 | #define SC_R_DC_0_FRAC0 30U |
| 200 | #define SC_R_DC_0_FRAC1 31U |
| 201 | #define SC_R_DC_0 32U |
| 202 | #define SC_R_GPU_2_PID0 33U |
| 203 | #define SC_R_DC_0_PLL_0 34U |
| 204 | #define SC_R_DC_0_PLL_1 35U |
| 205 | #define SC_R_DC_1_BLIT0 36U |
| 206 | #define SC_R_DC_1_BLIT1 37U |
| 207 | #define SC_R_DC_1_BLIT2 38U |
| 208 | #define SC_R_DC_1_BLIT_OUT 39U |
| 209 | #define SC_R_DC_1_CAPTURE0 40U |
| 210 | #define SC_R_DC_1_CAPTURE1 41U |
| 211 | #define SC_R_DC_1_WARP 42U |
| 212 | #define SC_R_DC_1_INTEGRAL0 43U |
| 213 | #define SC_R_DC_1_INTEGRAL1 44U |
| 214 | #define SC_R_DC_1_VIDEO0 45U |
| 215 | #define SC_R_DC_1_VIDEO1 46U |
| 216 | #define SC_R_DC_1_FRAC0 47U |
| 217 | #define SC_R_DC_1_FRAC1 48U |
| 218 | #define SC_R_DC_1 49U |
| 219 | #define SC_R_GPU_3_PID0 50U |
| 220 | #define SC_R_DC_1_PLL_0 51U |
| 221 | #define SC_R_DC_1_PLL_1 52U |
| 222 | #define SC_R_SPI_0 53U |
| 223 | #define SC_R_SPI_1 54U |
| 224 | #define SC_R_SPI_2 55U |
| 225 | #define SC_R_SPI_3 56U |
| 226 | #define SC_R_UART_0 57U |
| 227 | #define SC_R_UART_1 58U |
| 228 | #define SC_R_UART_2 59U |
| 229 | #define SC_R_UART_3 60U |
| 230 | #define SC_R_UART_4 61U |
| 231 | #define SC_R_EMVSIM_0 62U |
| 232 | #define SC_R_EMVSIM_1 63U |
| 233 | #define SC_R_DMA_0_CH0 64U |
| 234 | #define SC_R_DMA_0_CH1 65U |
| 235 | #define SC_R_DMA_0_CH2 66U |
| 236 | #define SC_R_DMA_0_CH3 67U |
| 237 | #define SC_R_DMA_0_CH4 68U |
| 238 | #define SC_R_DMA_0_CH5 69U |
| 239 | #define SC_R_DMA_0_CH6 70U |
| 240 | #define SC_R_DMA_0_CH7 71U |
| 241 | #define SC_R_DMA_0_CH8 72U |
| 242 | #define SC_R_DMA_0_CH9 73U |
| 243 | #define SC_R_DMA_0_CH10 74U |
| 244 | #define SC_R_DMA_0_CH11 75U |
| 245 | #define SC_R_DMA_0_CH12 76U |
| 246 | #define SC_R_DMA_0_CH13 77U |
| 247 | #define SC_R_DMA_0_CH14 78U |
| 248 | #define SC_R_DMA_0_CH15 79U |
| 249 | #define SC_R_DMA_0_CH16 80U |
| 250 | #define SC_R_DMA_0_CH17 81U |
| 251 | #define SC_R_DMA_0_CH18 82U |
| 252 | #define SC_R_DMA_0_CH19 83U |
| 253 | #define SC_R_DMA_0_CH20 84U |
| 254 | #define SC_R_DMA_0_CH21 85U |
| 255 | #define SC_R_DMA_0_CH22 86U |
| 256 | #define SC_R_DMA_0_CH23 87U |
| 257 | #define SC_R_DMA_0_CH24 88U |
| 258 | #define SC_R_DMA_0_CH25 89U |
| 259 | #define SC_R_DMA_0_CH26 90U |
| 260 | #define SC_R_DMA_0_CH27 91U |
| 261 | #define SC_R_DMA_0_CH28 92U |
| 262 | #define SC_R_DMA_0_CH29 93U |
| 263 | #define SC_R_DMA_0_CH30 94U |
| 264 | #define SC_R_DMA_0_CH31 95U |
| 265 | #define SC_R_I2C_0 96U |
| 266 | #define SC_R_I2C_1 97U |
| 267 | #define SC_R_I2C_2 98U |
| 268 | #define SC_R_I2C_3 99U |
| 269 | #define SC_R_I2C_4 100U |
| 270 | #define SC_R_ADC_0 101U |
| 271 | #define SC_R_ADC_1 102U |
| 272 | #define SC_R_FTM_0 103U |
| 273 | #define SC_R_FTM_1 104U |
| 274 | #define SC_R_CAN_0 105U |
| 275 | #define SC_R_CAN_1 106U |
| 276 | #define SC_R_CAN_2 107U |
| 277 | #define SC_R_DMA_1_CH0 108U |
| 278 | #define SC_R_DMA_1_CH1 109U |
| 279 | #define SC_R_DMA_1_CH2 110U |
| 280 | #define SC_R_DMA_1_CH3 111U |
| 281 | #define SC_R_DMA_1_CH4 112U |
| 282 | #define SC_R_DMA_1_CH5 113U |
| 283 | #define SC_R_DMA_1_CH6 114U |
| 284 | #define SC_R_DMA_1_CH7 115U |
| 285 | #define SC_R_DMA_1_CH8 116U |
| 286 | #define SC_R_DMA_1_CH9 117U |
| 287 | #define SC_R_DMA_1_CH10 118U |
| 288 | #define SC_R_DMA_1_CH11 119U |
| 289 | #define SC_R_DMA_1_CH12 120U |
| 290 | #define SC_R_DMA_1_CH13 121U |
| 291 | #define SC_R_DMA_1_CH14 122U |
| 292 | #define SC_R_DMA_1_CH15 123U |
| 293 | #define SC_R_DMA_1_CH16 124U |
| 294 | #define SC_R_DMA_1_CH17 125U |
| 295 | #define SC_R_DMA_1_CH18 126U |
| 296 | #define SC_R_DMA_1_CH19 127U |
| 297 | #define SC_R_DMA_1_CH20 128U |
| 298 | #define SC_R_DMA_1_CH21 129U |
| 299 | #define SC_R_DMA_1_CH22 130U |
| 300 | #define SC_R_DMA_1_CH23 131U |
| 301 | #define SC_R_DMA_1_CH24 132U |
| 302 | #define SC_R_DMA_1_CH25 133U |
| 303 | #define SC_R_DMA_1_CH26 134U |
| 304 | #define SC_R_DMA_1_CH27 135U |
| 305 | #define SC_R_DMA_1_CH28 136U |
| 306 | #define SC_R_DMA_1_CH29 137U |
| 307 | #define SC_R_DMA_1_CH30 138U |
| 308 | #define SC_R_DMA_1_CH31 139U |
| 309 | #define SC_R_UNUSED1 140U |
| 310 | #define SC_R_UNUSED2 141U |
| 311 | #define SC_R_UNUSED3 142U |
| 312 | #define SC_R_UNUSED4 143U |
| 313 | #define SC_R_GPU_0_PID0 144U |
| 314 | #define SC_R_GPU_0_PID1 145U |
| 315 | #define SC_R_GPU_0_PID2 146U |
| 316 | #define SC_R_GPU_0_PID3 147U |
| 317 | #define SC_R_GPU_1_PID0 148U |
| 318 | #define SC_R_GPU_1_PID1 149U |
| 319 | #define SC_R_GPU_1_PID2 150U |
| 320 | #define SC_R_GPU_1_PID3 151U |
| 321 | #define SC_R_PCIE_A 152U |
| 322 | #define SC_R_SERDES_0 153U |
| 323 | #define SC_R_MATCH_0 154U |
| 324 | #define SC_R_MATCH_1 155U |
| 325 | #define SC_R_MATCH_2 156U |
| 326 | #define SC_R_MATCH_3 157U |
| 327 | #define SC_R_MATCH_4 158U |
| 328 | #define SC_R_MATCH_5 159U |
| 329 | #define SC_R_MATCH_6 160U |
| 330 | #define SC_R_MATCH_7 161U |
| 331 | #define SC_R_MATCH_8 162U |
| 332 | #define SC_R_MATCH_9 163U |
| 333 | #define SC_R_MATCH_10 164U |
| 334 | #define SC_R_MATCH_11 165U |
| 335 | #define SC_R_MATCH_12 166U |
| 336 | #define SC_R_MATCH_13 167U |
| 337 | #define SC_R_MATCH_14 168U |
| 338 | #define SC_R_PCIE_B 169U |
| 339 | #define SC_R_SATA_0 170U |
| 340 | #define SC_R_SERDES_1 171U |
| 341 | #define SC_R_HSIO_GPIO 172U |
| 342 | #define SC_R_MATCH_15 173U |
| 343 | #define SC_R_MATCH_16 174U |
| 344 | #define SC_R_MATCH_17 175U |
| 345 | #define SC_R_MATCH_18 176U |
| 346 | #define SC_R_MATCH_19 177U |
| 347 | #define SC_R_MATCH_20 178U |
| 348 | #define SC_R_MATCH_21 179U |
| 349 | #define SC_R_MATCH_22 180U |
| 350 | #define SC_R_MATCH_23 181U |
| 351 | #define SC_R_MATCH_24 182U |
| 352 | #define SC_R_MATCH_25 183U |
| 353 | #define SC_R_MATCH_26 184U |
| 354 | #define SC_R_MATCH_27 185U |
| 355 | #define SC_R_MATCH_28 186U |
| 356 | #define SC_R_LCD_0 187U |
| 357 | #define SC_R_LCD_0_PWM_0 188U |
| 358 | #define SC_R_LCD_0_I2C_0 189U |
| 359 | #define SC_R_LCD_0_I2C_1 190U |
| 360 | #define SC_R_PWM_0 191U |
| 361 | #define SC_R_PWM_1 192U |
| 362 | #define SC_R_PWM_2 193U |
| 363 | #define SC_R_PWM_3 194U |
| 364 | #define SC_R_PWM_4 195U |
| 365 | #define SC_R_PWM_5 196U |
| 366 | #define SC_R_PWM_6 197U |
| 367 | #define SC_R_PWM_7 198U |
| 368 | #define SC_R_GPIO_0 199U |
| 369 | #define SC_R_GPIO_1 200U |
| 370 | #define SC_R_GPIO_2 201U |
| 371 | #define SC_R_GPIO_3 202U |
| 372 | #define SC_R_GPIO_4 203U |
| 373 | #define SC_R_GPIO_5 204U |
| 374 | #define SC_R_GPIO_6 205U |
| 375 | #define SC_R_GPIO_7 206U |
| 376 | #define SC_R_GPT_0 207U |
| 377 | #define SC_R_GPT_1 208U |
| 378 | #define SC_R_GPT_2 209U |
| 379 | #define SC_R_GPT_3 210U |
| 380 | #define SC_R_GPT_4 211U |
| 381 | #define SC_R_KPP 212U |
| 382 | #define SC_R_MU_0A 213U |
| 383 | #define SC_R_MU_1A 214U |
| 384 | #define SC_R_MU_2A 215U |
| 385 | #define SC_R_MU_3A 216U |
| 386 | #define SC_R_MU_4A 217U |
| 387 | #define SC_R_MU_5A 218U |
| 388 | #define SC_R_MU_6A 219U |
| 389 | #define SC_R_MU_7A 220U |
| 390 | #define SC_R_MU_8A 221U |
| 391 | #define SC_R_MU_9A 222U |
| 392 | #define SC_R_MU_10A 223U |
| 393 | #define SC_R_MU_11A 224U |
| 394 | #define SC_R_MU_12A 225U |
| 395 | #define SC_R_MU_13A 226U |
| 396 | #define SC_R_MU_5B 227U |
| 397 | #define SC_R_MU_6B 228U |
| 398 | #define SC_R_MU_7B 229U |
| 399 | #define SC_R_MU_8B 230U |
| 400 | #define SC_R_MU_9B 231U |
| 401 | #define SC_R_MU_10B 232U |
| 402 | #define SC_R_MU_11B 233U |
| 403 | #define SC_R_MU_12B 234U |
| 404 | #define SC_R_MU_13B 235U |
| 405 | #define SC_R_ROM_0 236U |
| 406 | #define SC_R_FSPI_0 237U |
| 407 | #define SC_R_FSPI_1 238U |
| 408 | #define SC_R_IEE 239U |
| 409 | #define SC_R_IEE_R0 240U |
| 410 | #define SC_R_IEE_R1 241U |
| 411 | #define SC_R_IEE_R2 242U |
| 412 | #define SC_R_IEE_R3 243U |
| 413 | #define SC_R_IEE_R4 244U |
| 414 | #define SC_R_IEE_R5 245U |
| 415 | #define SC_R_IEE_R6 246U |
| 416 | #define SC_R_IEE_R7 247U |
| 417 | #define SC_R_SDHC_0 248U |
| 418 | #define SC_R_SDHC_1 249U |
| 419 | #define SC_R_SDHC_2 250U |
| 420 | #define SC_R_ENET_0 251U |
| 421 | #define SC_R_ENET_1 252U |
| 422 | #define SC_R_MLB_0 253U |
| 423 | #define SC_R_DMA_2_CH0 254U |
| 424 | #define SC_R_DMA_2_CH1 255U |
| 425 | #define SC_R_DMA_2_CH2 256U |
| 426 | #define SC_R_DMA_2_CH3 257U |
| 427 | #define SC_R_DMA_2_CH4 258U |
| 428 | #define SC_R_USB_0 259U |
| 429 | #define SC_R_USB_1 260U |
| 430 | #define SC_R_USB_0_PHY 261U |
| 431 | #define SC_R_USB_2 262U |
| 432 | #define SC_R_USB_2_PHY 263U |
| 433 | #define SC_R_DTCP 264U |
| 434 | #define SC_R_NAND 265U |
| 435 | #define SC_R_LVDS_0 266U |
| 436 | #define SC_R_LVDS_0_PWM_0 267U |
| 437 | #define SC_R_LVDS_0_I2C_0 268U |
| 438 | #define SC_R_LVDS_0_I2C_1 269U |
| 439 | #define SC_R_LVDS_1 270U |
| 440 | #define SC_R_LVDS_1_PWM_0 271U |
| 441 | #define SC_R_LVDS_1_I2C_0 272U |
| 442 | #define SC_R_LVDS_1_I2C_1 273U |
| 443 | #define SC_R_LVDS_2 274U |
| 444 | #define SC_R_LVDS_2_PWM_0 275U |
| 445 | #define SC_R_LVDS_2_I2C_0 276U |
| 446 | #define SC_R_LVDS_2_I2C_1 277U |
| 447 | #define SC_R_M4_0_PID0 278U |
| 448 | #define SC_R_M4_0_PID1 279U |
| 449 | #define SC_R_M4_0_PID2 280U |
| 450 | #define SC_R_M4_0_PID3 281U |
| 451 | #define SC_R_M4_0_PID4 282U |
| 452 | #define SC_R_M4_0_RGPIO 283U |
| 453 | #define SC_R_M4_0_SEMA42 284U |
| 454 | #define SC_R_M4_0_TPM 285U |
| 455 | #define SC_R_M4_0_PIT 286U |
| 456 | #define SC_R_M4_0_UART 287U |
| 457 | #define SC_R_M4_0_I2C 288U |
| 458 | #define SC_R_M4_0_INTMUX 289U |
| 459 | #define SC_R_M4_0_SIM 290U |
| 460 | #define SC_R_M4_0_WDOG 291U |
| 461 | #define SC_R_M4_0_MU_0B 292U |
| 462 | #define SC_R_M4_0_MU_0A0 293U |
| 463 | #define SC_R_M4_0_MU_0A1 294U |
| 464 | #define SC_R_M4_0_MU_0A2 295U |
| 465 | #define SC_R_M4_0_MU_0A3 296U |
| 466 | #define SC_R_M4_0_MU_1A 297U |
| 467 | #define SC_R_M4_1_PID0 298U |
| 468 | #define SC_R_M4_1_PID1 299U |
| 469 | #define SC_R_M4_1_PID2 300U |
| 470 | #define SC_R_M4_1_PID3 301U |
| 471 | #define SC_R_M4_1_PID4 302U |
| 472 | #define SC_R_M4_1_RGPIO 303U |
| 473 | #define SC_R_M4_1_SEMA42 304U |
| 474 | #define SC_R_M4_1_TPM 305U |
| 475 | #define SC_R_M4_1_PIT 306U |
| 476 | #define SC_R_M4_1_UART 307U |
| 477 | #define SC_R_M4_1_I2C 308U |
| 478 | #define SC_R_M4_1_INTMUX 309U |
| 479 | #define SC_R_M4_1_SIM 310U |
| 480 | #define SC_R_M4_1_WDOG 311U |
| 481 | #define SC_R_M4_1_MU_0B 312U |
| 482 | #define SC_R_M4_1_MU_0A0 313U |
| 483 | #define SC_R_M4_1_MU_0A1 314U |
| 484 | #define SC_R_M4_1_MU_0A2 315U |
| 485 | #define SC_R_M4_1_MU_0A3 316U |
| 486 | #define SC_R_M4_1_MU_1A 317U |
| 487 | #define SC_R_SAI_0 318U |
| 488 | #define SC_R_SAI_1 319U |
| 489 | #define SC_R_SAI_2 320U |
| 490 | #define SC_R_IRQSTR_SCU2 321U |
| 491 | #define SC_R_IRQSTR_DSP 322U |
| 492 | #define SC_R_UNUSED5 323U |
| 493 | #define SC_R_OCRAM 324U |
| 494 | #define SC_R_AUDIO_PLL_0 325U |
| 495 | #define SC_R_PI_0 326U |
| 496 | #define SC_R_PI_0_PWM_0 327U |
| 497 | #define SC_R_PI_0_PWM_1 328U |
| 498 | #define SC_R_PI_0_I2C_0 329U |
| 499 | #define SC_R_PI_0_PLL 330U |
| 500 | #define SC_R_PI_1 331U |
| 501 | #define SC_R_PI_1_PWM_0 332U |
| 502 | #define SC_R_PI_1_PWM_1 333U |
| 503 | #define SC_R_PI_1_I2C_0 334U |
| 504 | #define SC_R_PI_1_PLL 335U |
| 505 | #define SC_R_SC_PID0 336U |
| 506 | #define SC_R_SC_PID1 337U |
| 507 | #define SC_R_SC_PID2 338U |
| 508 | #define SC_R_SC_PID3 339U |
| 509 | #define SC_R_SC_PID4 340U |
| 510 | #define SC_R_SC_SEMA42 341U |
| 511 | #define SC_R_SC_TPM 342U |
| 512 | #define SC_R_SC_PIT 343U |
| 513 | #define SC_R_SC_UART 344U |
| 514 | #define SC_R_SC_I2C 345U |
| 515 | #define SC_R_SC_MU_0B 346U |
| 516 | #define SC_R_SC_MU_0A0 347U |
| 517 | #define SC_R_SC_MU_0A1 348U |
| 518 | #define SC_R_SC_MU_0A2 349U |
| 519 | #define SC_R_SC_MU_0A3 350U |
| 520 | #define SC_R_SC_MU_1A 351U |
| 521 | #define SC_R_SYSCNT_RD 352U |
| 522 | #define SC_R_SYSCNT_CMP 353U |
| 523 | #define SC_R_DEBUG 354U |
| 524 | #define SC_R_SYSTEM 355U |
| 525 | #define SC_R_SNVS 356U |
| 526 | #define SC_R_OTP 357U |
| 527 | #define SC_R_VPU_PID0 358U |
| 528 | #define SC_R_VPU_PID1 359U |
| 529 | #define SC_R_VPU_PID2 360U |
| 530 | #define SC_R_VPU_PID3 361U |
| 531 | #define SC_R_VPU_PID4 362U |
| 532 | #define SC_R_VPU_PID5 363U |
| 533 | #define SC_R_VPU_PID6 364U |
| 534 | #define SC_R_VPU_PID7 365U |
| 535 | #define SC_R_VPU_UART 366U |
| 536 | #define SC_R_VPUCORE 367U |
| 537 | #define SC_R_VPUCORE_0 368U |
| 538 | #define SC_R_VPUCORE_1 369U |
| 539 | #define SC_R_VPUCORE_2 370U |
| 540 | #define SC_R_VPUCORE_3 371U |
| 541 | #define SC_R_DMA_4_CH0 372U |
| 542 | #define SC_R_DMA_4_CH1 373U |
| 543 | #define SC_R_DMA_4_CH2 374U |
| 544 | #define SC_R_DMA_4_CH3 375U |
| 545 | #define SC_R_DMA_4_CH4 376U |
| 546 | #define SC_R_ISI_CH0 377U |
| 547 | #define SC_R_ISI_CH1 378U |
| 548 | #define SC_R_ISI_CH2 379U |
| 549 | #define SC_R_ISI_CH3 380U |
| 550 | #define SC_R_ISI_CH4 381U |
| 551 | #define SC_R_ISI_CH5 382U |
| 552 | #define SC_R_ISI_CH6 383U |
| 553 | #define SC_R_ISI_CH7 384U |
| 554 | #define SC_R_MJPEG_DEC_S0 385U |
| 555 | #define SC_R_MJPEG_DEC_S1 386U |
| 556 | #define SC_R_MJPEG_DEC_S2 387U |
| 557 | #define SC_R_MJPEG_DEC_S3 388U |
| 558 | #define SC_R_MJPEG_ENC_S0 389U |
| 559 | #define SC_R_MJPEG_ENC_S1 390U |
| 560 | #define SC_R_MJPEG_ENC_S2 391U |
| 561 | #define SC_R_MJPEG_ENC_S3 392U |
| 562 | #define SC_R_MIPI_0 393U |
| 563 | #define SC_R_MIPI_0_PWM_0 394U |
| 564 | #define SC_R_MIPI_0_I2C_0 395U |
| 565 | #define SC_R_MIPI_0_I2C_1 396U |
| 566 | #define SC_R_MIPI_1 397U |
| 567 | #define SC_R_MIPI_1_PWM_0 398U |
| 568 | #define SC_R_MIPI_1_I2C_0 399U |
| 569 | #define SC_R_MIPI_1_I2C_1 400U |
| 570 | #define SC_R_CSI_0 401U |
| 571 | #define SC_R_CSI_0_PWM_0 402U |
| 572 | #define SC_R_CSI_0_I2C_0 403U |
| 573 | #define SC_R_CSI_1 404U |
| 574 | #define SC_R_CSI_1_PWM_0 405U |
| 575 | #define SC_R_CSI_1_I2C_0 406U |
| 576 | #define SC_R_HDMI 407U |
| 577 | #define SC_R_HDMI_I2S 408U |
| 578 | #define SC_R_HDMI_I2C_0 409U |
| 579 | #define SC_R_HDMI_PLL_0 410U |
| 580 | #define SC_R_HDMI_RX 411U |
| 581 | #define SC_R_HDMI_RX_BYPASS 412U |
| 582 | #define SC_R_HDMI_RX_I2C_0 413U |
| 583 | #define SC_R_ASRC_0 414U |
| 584 | #define SC_R_ESAI_0 415U |
| 585 | #define SC_R_SPDIF_0 416U |
| 586 | #define SC_R_SPDIF_1 417U |
| 587 | #define SC_R_SAI_3 418U |
| 588 | #define SC_R_SAI_4 419U |
| 589 | #define SC_R_SAI_5 420U |
| 590 | #define SC_R_GPT_5 421U |
| 591 | #define SC_R_GPT_6 422U |
| 592 | #define SC_R_GPT_7 423U |
| 593 | #define SC_R_GPT_8 424U |
| 594 | #define SC_R_GPT_9 425U |
| 595 | #define SC_R_GPT_10 426U |
| 596 | #define SC_R_DMA_2_CH5 427U |
| 597 | #define SC_R_DMA_2_CH6 428U |
| 598 | #define SC_R_DMA_2_CH7 429U |
| 599 | #define SC_R_DMA_2_CH8 430U |
| 600 | #define SC_R_DMA_2_CH9 431U |
| 601 | #define SC_R_DMA_2_CH10 432U |
| 602 | #define SC_R_DMA_2_CH11 433U |
| 603 | #define SC_R_DMA_2_CH12 434U |
| 604 | #define SC_R_DMA_2_CH13 435U |
| 605 | #define SC_R_DMA_2_CH14 436U |
| 606 | #define SC_R_DMA_2_CH15 437U |
| 607 | #define SC_R_DMA_2_CH16 438U |
| 608 | #define SC_R_DMA_2_CH17 439U |
| 609 | #define SC_R_DMA_2_CH18 440U |
| 610 | #define SC_R_DMA_2_CH19 441U |
| 611 | #define SC_R_DMA_2_CH20 442U |
| 612 | #define SC_R_DMA_2_CH21 443U |
| 613 | #define SC_R_DMA_2_CH22 444U |
| 614 | #define SC_R_DMA_2_CH23 445U |
| 615 | #define SC_R_DMA_2_CH24 446U |
| 616 | #define SC_R_DMA_2_CH25 447U |
| 617 | #define SC_R_DMA_2_CH26 448U |
| 618 | #define SC_R_DMA_2_CH27 449U |
| 619 | #define SC_R_DMA_2_CH28 450U |
| 620 | #define SC_R_DMA_2_CH29 451U |
| 621 | #define SC_R_DMA_2_CH30 452U |
| 622 | #define SC_R_DMA_2_CH31 453U |
| 623 | #define SC_R_ASRC_1 454U |
| 624 | #define SC_R_ESAI_1 455U |
| 625 | #define SC_R_SAI_6 456U |
| 626 | #define SC_R_SAI_7 457U |
| 627 | #define SC_R_AMIX 458U |
| 628 | #define SC_R_MQS_0 459U |
| 629 | #define SC_R_DMA_3_CH0 460U |
| 630 | #define SC_R_DMA_3_CH1 461U |
| 631 | #define SC_R_DMA_3_CH2 462U |
| 632 | #define SC_R_DMA_3_CH3 463U |
| 633 | #define SC_R_DMA_3_CH4 464U |
| 634 | #define SC_R_DMA_3_CH5 465U |
| 635 | #define SC_R_DMA_3_CH6 466U |
| 636 | #define SC_R_DMA_3_CH7 467U |
| 637 | #define SC_R_DMA_3_CH8 468U |
| 638 | #define SC_R_DMA_3_CH9 469U |
| 639 | #define SC_R_DMA_3_CH10 470U |
| 640 | #define SC_R_DMA_3_CH11 471U |
| 641 | #define SC_R_DMA_3_CH12 472U |
| 642 | #define SC_R_DMA_3_CH13 473U |
| 643 | #define SC_R_DMA_3_CH14 474U |
| 644 | #define SC_R_DMA_3_CH15 475U |
| 645 | #define SC_R_DMA_3_CH16 476U |
| 646 | #define SC_R_DMA_3_CH17 477U |
| 647 | #define SC_R_DMA_3_CH18 478U |
| 648 | #define SC_R_DMA_3_CH19 479U |
| 649 | #define SC_R_DMA_3_CH20 480U |
| 650 | #define SC_R_DMA_3_CH21 481U |
| 651 | #define SC_R_DMA_3_CH22 482U |
| 652 | #define SC_R_DMA_3_CH23 483U |
| 653 | #define SC_R_DMA_3_CH24 484U |
| 654 | #define SC_R_DMA_3_CH25 485U |
| 655 | #define SC_R_DMA_3_CH26 486U |
| 656 | #define SC_R_DMA_3_CH27 487U |
| 657 | #define SC_R_DMA_3_CH28 488U |
| 658 | #define SC_R_DMA_3_CH29 489U |
| 659 | #define SC_R_DMA_3_CH30 490U |
| 660 | #define SC_R_DMA_3_CH31 491U |
| 661 | #define SC_R_AUDIO_PLL_1 492U |
| 662 | #define SC_R_AUDIO_CLK_0 493U |
| 663 | #define SC_R_AUDIO_CLK_1 494U |
| 664 | #define SC_R_MCLK_OUT_0 495U |
| 665 | #define SC_R_MCLK_OUT_1 496U |
| 666 | #define SC_R_PMIC_0 497U |
| 667 | #define SC_R_PMIC_1 498U |
| 668 | #define SC_R_SECO 499U |
| 669 | #define SC_R_CAAM_JR1 500U |
| 670 | #define SC_R_CAAM_JR2 501U |
| 671 | #define SC_R_CAAM_JR3 502U |
| 672 | #define SC_R_SECO_MU_2 503U |
| 673 | #define SC_R_SECO_MU_3 504U |
| 674 | #define SC_R_SECO_MU_4 505U |
| 675 | #define SC_R_HDMI_RX_PWM_0 506U |
| 676 | #define SC_R_A35 507U |
| 677 | #define SC_R_A35_0 508U |
| 678 | #define SC_R_A35_1 509U |
| 679 | #define SC_R_A35_2 510U |
| 680 | #define SC_R_A35_3 511U |
| 681 | #define SC_R_DSP 512U |
| 682 | #define SC_R_DSP_RAM 513U |
| 683 | #define SC_R_CAAM_JR1_OUT 514U |
| 684 | #define SC_R_CAAM_JR2_OUT 515U |
| 685 | #define SC_R_CAAM_JR3_OUT 516U |
| 686 | #define SC_R_VPU_DEC_0 517U |
| 687 | #define SC_R_VPU_ENC_0 518U |
| 688 | #define SC_R_CAAM_JR0 519U |
| 689 | #define SC_R_CAAM_JR0_OUT 520U |
| 690 | #define SC_R_PMIC_2 521U |
| 691 | #define SC_R_DBLOGIC 522U |
| 692 | #define SC_R_HDMI_PLL_1 523U |
| 693 | #define SC_R_BOARD_R0 524U |
| 694 | #define SC_R_BOARD_R1 525U |
| 695 | #define SC_R_BOARD_R2 526U |
| 696 | #define SC_R_BOARD_R3 527U |
| 697 | #define SC_R_BOARD_R4 528U |
| 698 | #define SC_R_BOARD_R5 529U |
| 699 | #define SC_R_BOARD_R6 530U |
| 700 | #define SC_R_BOARD_R7 531U |
| 701 | #define SC_R_MJPEG_DEC_MP 532U |
| 702 | #define SC_R_MJPEG_ENC_MP 533U |
| 703 | #define SC_R_VPU_TS_0 534U |
| 704 | #define SC_R_VPU_MU_0 535U |
| 705 | #define SC_R_VPU_MU_1 536U |
| 706 | #define SC_R_VPU_MU_2 537U |
| 707 | #define SC_R_VPU_MU_3 538U |
| 708 | #define SC_R_VPU_ENC_1 539U |
| 709 | #define SC_R_VPU 540U |
| 710 | #define SC_R_LAST 541U |
| 711 | #define SC_R_ALL ((sc_rsrc_t) UINT16_MAX) /* All resources */ |
| 712 | /*@}*/ |
| 713 | |
| 714 | /* NOTE - please add by replacing some of the UNUSED from above! */ |
| 715 | |
| 716 | /*! |
| 717 | * Defnes for sc_ctrl_t. |
| 718 | */ |
| 719 | #define SC_C_TEMP 0U |
| 720 | #define SC_C_TEMP_HI 1U |
| 721 | #define SC_C_TEMP_LOW 2U |
| 722 | #define SC_C_PXL_LINK_MST1_ADDR 3U |
| 723 | #define SC_C_PXL_LINK_MST2_ADDR 4U |
| 724 | #define SC_C_PXL_LINK_MST_ENB 5U |
| 725 | #define SC_C_PXL_LINK_MST1_ENB 6U |
| 726 | #define SC_C_PXL_LINK_MST2_ENB 7U |
| 727 | #define SC_C_PXL_LINK_SLV1_ADDR 8U |
| 728 | #define SC_C_PXL_LINK_SLV2_ADDR 9U |
| 729 | #define SC_C_PXL_LINK_MST_VLD 10U |
| 730 | #define SC_C_PXL_LINK_MST1_VLD 11U |
| 731 | #define SC_C_PXL_LINK_MST2_VLD 12U |
| 732 | #define SC_C_SINGLE_MODE 13U |
| 733 | #define SC_C_ID 14U |
| 734 | #define SC_C_PXL_CLK_POLARITY 15U |
| 735 | #define SC_C_LINESTATE 16U |
| 736 | #define SC_C_PCIE_G_RST 17U |
| 737 | #define SC_C_PCIE_BUTTON_RST 18U |
| 738 | #define SC_C_PCIE_PERST 19U |
| 739 | #define SC_C_PHY_RESET 20U |
| 740 | #define SC_C_PXL_LINK_RATE_CORRECTION 21U |
| 741 | #define SC_C_PANIC 22U |
| 742 | #define SC_C_PRIORITY_GROUP 23U |
| 743 | #define SC_C_TXCLK 24U |
| 744 | #define SC_C_CLKDIV 25U |
| 745 | #define SC_C_DISABLE_50 26U |
| 746 | #define SC_C_DISABLE_125 27U |
| 747 | #define SC_C_SEL_125 28U |
| 748 | #define SC_C_MODE 29U |
| 749 | #define SC_C_SYNC_CTRL0 30U |
| 750 | #define SC_C_KACHUNK_CNT 31U |
| 751 | #define SC_C_KACHUNK_SEL 32U |
| 752 | #define SC_C_SYNC_CTRL1 33U |
| 753 | #define SC_C_DPI_RESET 34U |
| 754 | #define SC_C_MIPI_RESET 35U |
| 755 | #define SC_C_DUAL_MODE 36U |
| 756 | #define SC_C_VOLTAGE 37U |
| 757 | #define SC_C_PXL_LINK_SEL 38U |
| 758 | #define SC_C_OFS_SEL 39U |
| 759 | #define SC_C_OFS_AUDIO 40U |
| 760 | #define SC_C_OFS_PERIPH 41U |
| 761 | #define SC_C_OFS_IRQ 42U |
| 762 | #define SC_C_RST0 43U |
| 763 | #define SC_C_RST1 44U |
| 764 | #define SC_C_SEL0 45U |
| 765 | #define SC_C_LAST 46U |
| 766 | |
| 767 | #define SC_P_ALL ((sc_pad_t) UINT16_MAX) /* All pads */ |
| 768 | |
| 769 | /* Types */ |
| 770 | |
| 771 | /*! |
| 772 | * This type is used to store a boolean |
| 773 | */ |
| 774 | typedef uint8_t sc_bool_t; |
| 775 | |
| 776 | /*! |
| 777 | * This type is used to store a system (full-size) address. |
| 778 | */ |
| 779 | typedef uint64_t sc_faddr_t; |
| 780 | |
| 781 | /*! |
| 782 | * This type is used to indicate error response for most functions. |
| 783 | */ |
| 784 | typedef uint8_t sc_err_t; |
| 785 | |
| 786 | /*! |
| 787 | * This type is used to indicate a resource. Resources include peripherals |
| 788 | * and bus masters (but not memory regions). Note items from list should |
| 789 | * never be changed or removed (only added to at the end of the list). |
| 790 | */ |
| 791 | typedef uint16_t sc_rsrc_t; |
| 792 | |
| 793 | /*! |
| 794 | * This type is used to indicate a control. |
| 795 | */ |
| 796 | typedef uint8_t sc_ctrl_t; |
| 797 | |
| 798 | /*! |
| 799 | * This type is used to indicate a pad. Valid values are SoC specific. |
| 800 | * |
| 801 | * Refer to the SoC [Pad List](@ref PADS) for valid pad values. |
| 802 | */ |
| 803 | typedef uint16_t sc_pad_t; |
| 804 | |
| 805 | /* Extra documentation of standard types */ |
| 806 | |
| 807 | #ifdef DOXYGEN |
| 808 | /*! |
| 809 | * Type used to declare an 8-bit integer. |
| 810 | */ |
| 811 | typedef __INT8_TYPE__ int8_t; |
| 812 | |
| 813 | /*! |
| 814 | * Type used to declare a 16-bit integer. |
| 815 | */ |
| 816 | typedef __INT16_TYPE__ int16_t; |
| 817 | |
| 818 | /*! |
| 819 | * Type used to declare a 32-bit integer. |
| 820 | */ |
| 821 | typedef __INT32_TYPE__ int32_t; |
| 822 | |
| 823 | /*! |
| 824 | * Type used to declare a 64-bit integer. |
| 825 | */ |
| 826 | typedef __INT64_TYPE__ int64_t; |
| 827 | |
| 828 | /*! |
| 829 | * Type used to declare an 8-bit unsigned integer. |
| 830 | */ |
| 831 | typedef __UINT8_TYPE__ uint8_t; |
| 832 | |
| 833 | /*! |
| 834 | * Type used to declare a 16-bit unsigned integer. |
| 835 | */ |
| 836 | typedef __UINT16_TYPE__ uint16_t; |
| 837 | |
| 838 | /*! |
| 839 | * Type used to declare a 32-bit unsigned integer. |
| 840 | */ |
| 841 | typedef __UINT32_TYPE__ uint32_t; |
| 842 | |
| 843 | /*! |
| 844 | * Type used to declare a 64-bit unsigned integer. |
| 845 | */ |
| 846 | typedef __UINT64_TYPE__ uint64_t; |
| 847 | #endif |
| 848 | |
| Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 849 | #endif /* SCI_TYPES_H */ |