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Bryan O'Donoghue4b576102018-07-11 16:35:17 +01001/*
Samuel Hollande6c94952019-12-04 02:48:37 -06002 * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
Bryan O'Donoghue4b576102018-07-11 16:35:17 +01003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef IMX_CAAM_H
8#define IMX_CAAM_H
Bryan O'Donoghue4b576102018-07-11 16:35:17 +01009
Samuel Hollande6c94952019-12-04 02:48:37 -060010#include <cdefs.h>
Bryan O'Donoghue4b576102018-07-11 16:35:17 +010011#include <stdint.h>
12#include <arch.h>
13#include <imx_regs.h>
14
15struct caam_job_ring {
16 uint32_t jrmidr_ms;
17 uint32_t jrmidr_ls;
18};
19
20struct caam_rtic_mid {
21 uint32_t rticmidr_ms;
22 uint32_t rticmidr_ls;
23};
24
25struct caam_deco {
26 uint32_t deco_mid_ms;
27 uint32_t deco_mid_ls;
28};
29
30#define JOB_RING_OFFSET 0x10
31#define DEBUGCTL_OFFSET 0x58
32#define RES2_SIZE (DEBUGCTL_OFFSET - JOB_RING_OFFSET - \
33 (sizeof(struct caam_job_ring) * CAAM_NUM_JOB_RINGS))
34
35#define RTIC_MID_OFFSET 0x60
36#define DECORR_OFFSET 0x9C
37#define RES3_SIZE (DECORR_OFFSET - RTIC_MID_OFFSET - \
38 (sizeof(struct caam_rtic_mid) * CAAM_NUM_RTIC))
39
40#define DECO_MID_OFFSET 0xA0
41#define DAR_OFFSET 0x120
42#define RES4_SIZE (DAR_OFFSET - DECO_MID_OFFSET - \
43 (sizeof(struct caam_deco) * CAAM_NUM_DECO))
44
45struct caam_ctrl {
46 uint32_t res0;
47 uint32_t mcfgr;
48 uint32_t res1;
49 uint32_t scfgr;
50 struct caam_job_ring jr[CAAM_NUM_JOB_RINGS];
51 uint8_t res2[RES2_SIZE];
52 uint32_t debuctl;
53 uint32_t jrstartr;
54 struct caam_rtic_mid mid[CAAM_NUM_RTIC];
55 uint8_t res3[RES3_SIZE];
56 uint32_t decorr;
57 struct caam_deco deco[CAAM_NUM_DECO];
58 uint8_t res4[RES4_SIZE];
59 uint32_t dar;
60 uint32_t drr;
61} __packed;
62
63/* Job ring control bits */
64#define JROWN_NS BIT(3)
65#define JROWN_MID 0x01
66
67/* Declare CAAM API */
68void imx_caam_init(void);
69
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000070#endif /* IMX_CAAM_H */