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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <stdio.h>
32#include <string.h>
33#include <assert.h>
34#include <arch_helpers.h>
35#include <console.h>
36#include <platform.h>
37#include <semihosting.h>
38#include <bl_common.h>
39#include <bl31.h>
40#include <runtime_svc.h>
Achin Gupta7aea9082014-02-01 07:51:28 +000041#include <context_mgmt.h>
42
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000043
44/*******************************************************************************
45 * This function pointer is used to initialise the BL32 image. It's initialized
46 * by SPD calling bl31_register_bl32_init after setting up all things necessary
47 * for SP execution. In cases where both SPD and SP are absent, or when SPD
48 * finds it impossible to execute SP, this pointer is left as NULL
49 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +010050static int32_t (*bl32_init)(meminfo_t *);
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000051
Achin Gupta7aea9082014-02-01 07:51:28 +000052/*******************************************************************************
Achin Gupta35ca3512014-02-19 17:58:33 +000053 * Variable to indicate whether next image to execute after BL31 is BL33
54 * (non-secure & default) or BL32 (secure).
55 ******************************************************************************/
56static uint32_t next_image_type = NON_SECURE;
57
58/*******************************************************************************
Achin Gupta7aea9082014-02-01 07:51:28 +000059 * Simple function to initialise all BL31 helper libraries.
60 ******************************************************************************/
61void bl31_lib_init()
62{
63 cm_init();
64}
Achin Gupta4f6ad662013-10-25 09:08:21 +010065
Achin Gupta4f6ad662013-10-25 09:08:21 +010066/*******************************************************************************
67 * BL31 is responsible for setting up the runtime services for the primary cpu
Achin Gupta35ca3512014-02-19 17:58:33 +000068 * before passing control to the bootloader or an Operating System. This
69 * function calls runtime_svc_init() which initializes all registered runtime
70 * services. The run time services would setup enough context for the core to
71 * swtich to the next exception level. When this function returns, the core will
72 * switch to the programmed exception level via. an ERET.
Achin Gupta4f6ad662013-10-25 09:08:21 +010073 ******************************************************************************/
74void bl31_main(void)
75{
Achin Gupta35ca3512014-02-19 17:58:33 +000076#if DEBUG
77 unsigned long mpidr = read_mpidr();
78#endif
Achin Gupta4f6ad662013-10-25 09:08:21 +010079
80 /* Perform remaining generic architectural setup from EL3 */
81 bl31_arch_setup();
82
83 /* Perform platform setup in BL1 */
84 bl31_platform_setup();
85
Jon Medhurstecf0a712014-02-17 12:18:24 +000086 printf("BL31 %s\n\r", build_message);
87
Achin Gupta7aea9082014-02-01 07:51:28 +000088 /* Initialise helper libraries */
89 bl31_lib_init();
Achin Gupta4f6ad662013-10-25 09:08:21 +010090
91 /* Initialize the runtime services e.g. psci */
Achin Gupta7421b462014-02-01 18:53:26 +000092 runtime_svc_init();
Achin Gupta4f6ad662013-10-25 09:08:21 +010093
94 /* Clean caches before re-entering normal world */
95 dcsw_op_all(DCCSW);
96
Jeenu Viswambharancaa84932014-02-06 10:36:15 +000097 /*
Achin Gupta35ca3512014-02-19 17:58:33 +000098 * Use the more complex exception vectors now that context
99 * management is setup. SP_EL3 should point to a 'cpu_context'
100 * structure which has an exception stack allocated. The PSCI
101 * service should have set the context.
102 */
103 assert(cm_get_context(mpidr, NON_SECURE));
104 cm_set_next_eret_context(NON_SECURE);
105 write_vbar_el3((uint64_t) runtime_exceptions);
106
107 /*
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000108 * All the cold boot actions on the primary cpu are done. We now need to
109 * decide which is the next image (BL32 or BL33) and how to execute it.
110 * If the SPD runtime service is present, it would want to pass control
111 * to BL32 first in S-EL1. In that case, SPD would have registered a
112 * function to intialize bl32 where it takes responsibility of entering
113 * S-EL1 and returning control back to bl31_main. Once this is done we
114 * can prepare entry into BL33 as normal.
Achin Gupta35ca3512014-02-19 17:58:33 +0000115 */
116
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000117 /*
118 * If SPD had registerd an init hook, invoke it. Pass it the information
119 * about memory extents
120 */
Achin Gupta35ca3512014-02-19 17:58:33 +0000121 if (bl32_init)
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000122 (*bl32_init)(bl31_plat_get_bl32_mem_layout());
Achin Gupta35ca3512014-02-19 17:58:33 +0000123
124 /*
125 * We are ready to enter the next EL. Prepare entry into the image
126 * corresponding to the desired security state after the next ERET.
127 */
128 bl31_prepare_next_image_entry();
129}
130
131/*******************************************************************************
132 * Accessor functions to help runtime services decide which image should be
133 * executed after BL31. This is BL33 or the non-secure bootloader image by
134 * default but the Secure payload dispatcher could override this by requesting
135 * an entry into BL32 (Secure payload) first. If it does so then it should use
136 * the same API to program an entry into BL33 once BL32 initialisation is
137 * complete.
138 ******************************************************************************/
139void bl31_set_next_image_type(uint32_t security_state)
140{
141 assert(security_state == NON_SECURE || security_state == SECURE);
142 next_image_type = security_state;
143}
144
145uint32_t bl31_get_next_image_type(void)
146{
147 return next_image_type;
148}
149
150/*******************************************************************************
151 * This function programs EL3 registers and performs other setup to enable entry
152 * into the next image after BL31 at the next ERET.
153 ******************************************************************************/
154void bl31_prepare_next_image_entry()
155{
Dan Handleye2712bc2014-04-10 15:37:22 +0100156 el_change_info_t *next_image_info;
Achin Gupta35ca3512014-02-19 17:58:33 +0000157 uint32_t scr, image_type;
158
159 /* Determine which image to execute next */
160 image_type = bl31_get_next_image_type();
161
162 /*
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000163 * Setup minimal architectural state of the next highest EL to
164 * allow execution in it immediately upon entering it.
165 */
Achin Gupta35ca3512014-02-19 17:58:33 +0000166 bl31_next_el_arch_setup(image_type);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000167
168 /* Program EL3 registers to enable entry into the next EL */
Achin Gupta35ca3512014-02-19 17:58:33 +0000169 next_image_info = bl31_get_next_image_info(image_type);
170 assert(next_image_info);
171
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000172 scr = read_scr();
Achin Gupta35ca3512014-02-19 17:58:33 +0000173 if (image_type == NON_SECURE)
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000174 scr |= SCR_NS_BIT;
175
176 /*
177 * Tell the context mgmt. library to ensure that SP_EL3 points to
178 * the right context to exit from EL3 correctly.
179 */
180 cm_set_el3_eret_context(next_image_info->security_state,
181 next_image_info->entrypoint,
182 next_image_info->spsr,
183 scr);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100184
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000185 /* Finally set the next context */
186 cm_set_next_eret_context(next_image_info->security_state);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100187}
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000188
189/*******************************************************************************
190 * This function initializes the pointer to BL32 init function. This is expected
191 * to be called by the SPD after it finishes all its initialization
192 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100193void bl31_register_bl32_init(int32_t (*func)(meminfo_t *))
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000194{
195 bl32_init = func;
196}