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Samuel Hollandb8566642017-08-12 04:07:39 -05001/*
2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Samuel Hollandb8566642017-08-12 04:07:39 -05007#include <platform_def.h>
8
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00009#include <arch.h>
10#include <plat/common/platform.h>
11
Samuel Hollandb8566642017-08-12 04:07:39 -050012static unsigned char plat_power_domain_tree_desc[PLAT_MAX_PWR_LVL + 1] = {
13 /* One root node for the SoC */
14 1,
15 /* One node for each cluster */
16 PLATFORM_CLUSTER_COUNT,
17 /* One set of CPUs per cluster */
18 PLATFORM_MAX_CPUS_PER_CLUSTER,
19};
20
21int plat_core_pos_by_mpidr(u_register_t mpidr)
22{
23 unsigned int cluster = MPIDR_AFFLVL1_VAL(mpidr);
24 unsigned int core = MPIDR_AFFLVL0_VAL(mpidr);
25
26 if (MPIDR_AFFLVL3_VAL(mpidr) > 0 ||
27 MPIDR_AFFLVL2_VAL(mpidr) > 0 ||
28 cluster >= PLATFORM_CLUSTER_COUNT ||
29 core >= PLATFORM_MAX_CPUS_PER_CLUSTER) {
30 return -1;
31 }
32
33 return cluster * PLATFORM_MAX_CPUS_PER_CLUSTER + core;
34}
35
36const unsigned char *plat_get_power_domain_tree_desc(void)
37{
38 return plat_power_domain_tree_desc;
39}