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Yann Gautier761797d2018-07-16 14:34:50 +02001/*
Yann Gautier230bf912021-09-15 11:30:25 +02002 * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
Yann Gautier761797d2018-07-16 14:34:50 +02003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef STM32MP1_LD_S
8#define STM32MP1_LD_S
9
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010#include <lib/xlat_tables/xlat_tables_defs.h>
Yann Gautier761797d2018-07-16 14:34:50 +020011#include <platform_def.h>
Yann Gautier761797d2018-07-16 14:34:50 +020012
13OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT)
14OUTPUT_ARCH(PLATFORM_LINKER_ARCH)
15
16ENTRY(__BL2_IMAGE_START__)
17
18MEMORY {
19 HEADER (rw) : ORIGIN = 0x00000000, LENGTH = 0x3000
Yann Gautiera2e2a302019-02-14 11:13:39 +010020 RAM (rwx) : ORIGIN = STM32MP_BINARY_BASE, LENGTH = STM32MP_BINARY_SIZE
Yann Gautier761797d2018-07-16 14:34:50 +020021}
22
23SECTIONS
24{
25 /*
26 * TF mapping must conform to ROM code specification.
27 */
28 .header : {
29 __HEADER_START__ = .;
30 KEEP(*(.header))
31 . = ALIGN(4);
32 __HEADER_END__ = .;
33 } >HEADER
34
Yann Gautiera2e2a302019-02-14 11:13:39 +010035 . = STM32MP_BINARY_BASE;
Yann Gautier761797d2018-07-16 14:34:50 +020036 .data . : {
37 . = ALIGN(PAGE_SIZE);
38 __DATA_START__ = .;
39 *(.data*)
40
41 /*
42 * dtb.
43 * The strongest and only alignment contraint is MMU 4K page.
44 * Indeed as images below will be removed, 4K pages will be re-used.
45 */
Yann Gautier0ed7b2a2021-05-19 18:48:16 +020046#if STM32MP_USE_STM32IMAGE
Yann Gautiera2e2a302019-02-14 11:13:39 +010047 . = ( STM32MP_DTB_BASE - STM32MP_BINARY_BASE );
Yann Gautier0ed7b2a2021-05-19 18:48:16 +020048#else
49 . = ( STM32MP_BL2_DTB_BASE - STM32MP_BINARY_BASE );
50#endif /* STM32MP_USE_STM32IMAGE */
Yann Gautier761797d2018-07-16 14:34:50 +020051 __DTB_IMAGE_START__ = .;
52 *(.dtb_image*)
53 __DTB_IMAGE_END__ = .;
54
55 /*
56 * bl2.
57 * The strongest and only alignment contraint is MMU 4K page.
58 * Indeed as images below will be removed, 4K pages will be re-used.
59 */
Yann Gautier230bf912021-09-15 11:30:25 +020060#if SEPARATE_CODE_AND_RODATA
61 . = ( STM32MP_BL2_RO_BASE - STM32MP_BINARY_BASE );
62#else
Yann Gautiera2e2a302019-02-14 11:13:39 +010063 . = ( STM32MP_BL2_BASE - STM32MP_BINARY_BASE );
Yann Gautier230bf912021-09-15 11:30:25 +020064#endif
Yann Gautier761797d2018-07-16 14:34:50 +020065 __BL2_IMAGE_START__ = .;
66 *(.bl2_image*)
67 __BL2_IMAGE_END__ = .;
68
Yann Gautier0ed7b2a2021-05-19 18:48:16 +020069#if STM32MP_USE_STM32IMAGE && !defined(AARCH32_SP_OPTEE)
Yann Gautier761797d2018-07-16 14:34:50 +020070 /*
71 * bl32 will be settled by bl2.
72 * The strongest and only alignment constraint is 8 words to simplify
73 * memraise8 assembly code.
74 */
Yann Gautiera2e2a302019-02-14 11:13:39 +010075 . = ( STM32MP_BL32_BASE - STM32MP_BINARY_BASE );
Yann Gautier761797d2018-07-16 14:34:50 +020076 __BL32_IMAGE_START__ = .;
77 *(.bl32_image*)
78 __BL32_IMAGE_END__ = .;
Yann Gautier0ed7b2a2021-05-19 18:48:16 +020079#endif /* STM32MP_USE_STM32IMAGE && !defined(AARCH32_SP_OPTEE) */
Yann Gautier761797d2018-07-16 14:34:50 +020080
81 __DATA_END__ = .;
82 } >RAM
83
84 __TF_END__ = .;
85
86}
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000087#endif /* STM32MP1_LD_S */