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Achin Gupta7c88f3f2014-02-18 18:09:12 +00001/*
Govindraj Raja24d3a4e2023-12-21 13:57:49 -06002 * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
Achin Gupta7c88f3f2014-02-18 18:09:12 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta7c88f3f2014-02-18 18:09:12 +00005 */
6
Alexei Fedorovf41355c2019-09-13 14:11:59 +01007#include <assert.h>
Scott Brandene5dcf982020-08-25 13:49:32 -07008#include <inttypes.h>
9#include <stdint.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010
Alexei Fedorovf41355c2019-09-13 14:11:59 +010011#include <arch_features.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000012#include <arch_helpers.h>
13#include <bl32/tsp/tsp.h>
14#include <common/bl_common.h>
15#include <common/debug.h>
16#include <lib/spinlock.h>
17#include <plat/common/platform.h>
Dan Handley4fd2f5c2014-08-04 11:41:20 +010018#include <platform_tsp.h>
Dan Handleye2c27f52014-08-01 17:58:27 +010019#include "tsp_private.h"
Achin Gupta7c88f3f2014-02-18 18:09:12 +000020
Achin Gupta6b4ec242021-10-04 20:13:36 +010021#include <platform_def.h>
Antonio Nino Diaze61ece02019-02-26 11:41:03 +000022
23/*******************************************************************************
Achin Gupta7c88f3f2014-02-18 18:09:12 +000024 * TSP main entry point where it gets the opportunity to initialize its secure
25 * state/applications. Once the state is initialized, it must return to the
Andrew Thoelke891c4ca2014-05-20 21:43:27 +010026 * SPD with a pointer to the 'tsp_vector_table' jump table.
Achin Gupta7c88f3f2014-02-18 18:09:12 +000027 ******************************************************************************/
28uint64_t tsp_main(void)
29{
Dan Handley91b624e2014-07-29 17:14:00 +010030 NOTICE("TSP: %s\n", version_string);
31 NOTICE("TSP: %s\n", build_message);
Sandrine Bailleuxbdba5e52016-06-16 14:24:26 +010032 INFO("TSP: Total memory base : 0x%lx\n", (unsigned long) BL32_BASE);
33 INFO("TSP: Total memory size : 0x%lx bytes\n", BL32_TOTAL_SIZE);
Dan Handley91b624e2014-07-29 17:14:00 +010034
Soby Mathewda43b662015-07-08 21:45:46 +010035 uint32_t linear_id = plat_my_core_pos();
Achin Gupta7c88f3f2014-02-18 18:09:12 +000036
Achin Gupta7c88f3f2014-02-18 18:09:12 +000037 /* Initialize the platform */
Dan Handley4fd2f5c2014-08-04 11:41:20 +010038 tsp_platform_setup();
Achin Gupta7c88f3f2014-02-18 18:09:12 +000039
40 /* Initialize secure/applications state here */
Achin Guptabbc33f22014-05-09 13:33:42 +010041 tsp_generic_timer_start();
Achin Gupta7c88f3f2014-02-18 18:09:12 +000042
43 /* Update this cpu's statistics */
44 tsp_stats[linear_id].smc_count++;
45 tsp_stats[linear_id].eret_count++;
46 tsp_stats[linear_id].cpu_on_count++;
47
Soby Mathewda43b662015-07-08 21:45:46 +010048 INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu on requests\n",
49 read_mpidr(),
Achin Gupta7c88f3f2014-02-18 18:09:12 +000050 tsp_stats[linear_id].smc_count,
51 tsp_stats[linear_id].eret_count,
52 tsp_stats[linear_id].cpu_on_count);
Govindraj Raja55ca30d2023-05-22 13:22:42 -050053
54 console_flush();
Andrew Thoelke891c4ca2014-05-20 21:43:27 +010055 return (uint64_t) &tsp_vector_table;
Achin Gupta7c88f3f2014-02-18 18:09:12 +000056}
57
58/*******************************************************************************
59 * This function performs any remaining book keeping in the test secure payload
60 * after this cpu's architectural state has been setup in response to an earlier
61 * psci cpu_on request.
62 ******************************************************************************/
Achin Gupta6b4ec242021-10-04 20:13:36 +010063smc_args_t *tsp_cpu_on_main(void)
Achin Gupta7c88f3f2014-02-18 18:09:12 +000064{
Soby Mathewda43b662015-07-08 21:45:46 +010065 uint32_t linear_id = plat_my_core_pos();
Achin Gupta7c88f3f2014-02-18 18:09:12 +000066
Achin Guptabbc33f22014-05-09 13:33:42 +010067 /* Initialize secure/applications state here */
68 tsp_generic_timer_start();
69
Achin Gupta7c88f3f2014-02-18 18:09:12 +000070 /* Update this cpu's statistics */
71 tsp_stats[linear_id].smc_count++;
72 tsp_stats[linear_id].eret_count++;
73 tsp_stats[linear_id].cpu_on_count++;
74
Soby Mathewda43b662015-07-08 21:45:46 +010075 INFO("TSP: cpu 0x%lx turned on\n", read_mpidr());
76 INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu on requests\n",
77 read_mpidr(),
Dan Handley91b624e2014-07-29 17:14:00 +010078 tsp_stats[linear_id].smc_count,
79 tsp_stats[linear_id].eret_count,
80 tsp_stats[linear_id].cpu_on_count);
Achin Gupta7c88f3f2014-02-18 18:09:12 +000081 /* Indicate to the SPD that we have completed turned ourselves on */
82 return set_smc_args(TSP_ON_DONE, 0, 0, 0, 0, 0, 0, 0);
83}
84
85/*******************************************************************************
86 * This function performs any remaining book keeping in the test secure payload
87 * before this cpu is turned off in response to a psci cpu_off request.
88 ******************************************************************************/
Achin Gupta6b4ec242021-10-04 20:13:36 +010089smc_args_t *tsp_cpu_off_main(uint64_t arg0,
Achin Gupta7c88f3f2014-02-18 18:09:12 +000090 uint64_t arg1,
91 uint64_t arg2,
92 uint64_t arg3,
93 uint64_t arg4,
94 uint64_t arg5,
95 uint64_t arg6,
96 uint64_t arg7)
97{
Soby Mathewda43b662015-07-08 21:45:46 +010098 uint32_t linear_id = plat_my_core_pos();
Achin Gupta7c88f3f2014-02-18 18:09:12 +000099
Achin Guptabbc33f22014-05-09 13:33:42 +0100100 /*
101 * This cpu is being turned off, so disable the timer to prevent the
102 * secure timer interrupt from interfering with power down. A pending
103 * interrupt will be lost but we do not care as we are turning off.
104 */
105 tsp_generic_timer_stop();
106
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000107 /* Update this cpu's statistics */
108 tsp_stats[linear_id].smc_count++;
109 tsp_stats[linear_id].eret_count++;
110 tsp_stats[linear_id].cpu_off_count++;
111
Soby Mathewda43b662015-07-08 21:45:46 +0100112 INFO("TSP: cpu 0x%lx off request\n", read_mpidr());
113 INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu off requests\n",
114 read_mpidr(),
Dan Handley91b624e2014-07-29 17:14:00 +0100115 tsp_stats[linear_id].smc_count,
116 tsp_stats[linear_id].eret_count,
117 tsp_stats[linear_id].cpu_off_count);
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000118
Achin Gupta607084e2014-02-09 18:24:19 +0000119 /* Indicate to the SPD that we have completed this request */
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000120 return set_smc_args(TSP_OFF_DONE, 0, 0, 0, 0, 0, 0, 0);
121}
122
123/*******************************************************************************
124 * This function performs any book keeping in the test secure payload before
125 * this cpu's architectural state is saved in response to an earlier psci
126 * cpu_suspend request.
127 ******************************************************************************/
Achin Gupta6b4ec242021-10-04 20:13:36 +0100128smc_args_t *tsp_cpu_suspend_main(uint64_t arg0,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000129 uint64_t arg1,
130 uint64_t arg2,
131 uint64_t arg3,
132 uint64_t arg4,
133 uint64_t arg5,
134 uint64_t arg6,
135 uint64_t arg7)
136{
Soby Mathewda43b662015-07-08 21:45:46 +0100137 uint32_t linear_id = plat_my_core_pos();
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000138
Achin Guptabbc33f22014-05-09 13:33:42 +0100139 /*
140 * Save the time context and disable it to prevent the secure timer
141 * interrupt from interfering with wakeup from the suspend state.
142 */
143 tsp_generic_timer_save();
144 tsp_generic_timer_stop();
145
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000146 /* Update this cpu's statistics */
147 tsp_stats[linear_id].smc_count++;
148 tsp_stats[linear_id].eret_count++;
149 tsp_stats[linear_id].cpu_suspend_count++;
150
Sandrine Bailleux8723adf2015-02-05 15:42:31 +0000151 INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu suspend requests\n",
Soby Mathewda43b662015-07-08 21:45:46 +0100152 read_mpidr(),
Dan Handley91b624e2014-07-29 17:14:00 +0100153 tsp_stats[linear_id].smc_count,
154 tsp_stats[linear_id].eret_count,
155 tsp_stats[linear_id].cpu_suspend_count);
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000156
Achin Gupta607084e2014-02-09 18:24:19 +0000157 /* Indicate to the SPD that we have completed this request */
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000158 return set_smc_args(TSP_SUSPEND_DONE, 0, 0, 0, 0, 0, 0, 0);
159}
160
161/*******************************************************************************
162 * This function performs any book keeping in the test secure payload after this
163 * cpu's architectural state has been restored after wakeup from an earlier psci
164 * cpu_suspend request.
165 ******************************************************************************/
Achin Gupta6b4ec242021-10-04 20:13:36 +0100166smc_args_t *tsp_cpu_resume_main(uint64_t max_off_pwrlvl,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000167 uint64_t arg1,
168 uint64_t arg2,
169 uint64_t arg3,
170 uint64_t arg4,
171 uint64_t arg5,
172 uint64_t arg6,
173 uint64_t arg7)
174{
Soby Mathewda43b662015-07-08 21:45:46 +0100175 uint32_t linear_id = plat_my_core_pos();
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000176
Achin Guptabbc33f22014-05-09 13:33:42 +0100177 /* Restore the generic timer context */
178 tsp_generic_timer_restore();
179
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000180 /* Update this cpu's statistics */
181 tsp_stats[linear_id].smc_count++;
182 tsp_stats[linear_id].eret_count++;
183 tsp_stats[linear_id].cpu_resume_count++;
184
Scott Brandene5dcf982020-08-25 13:49:32 -0700185 INFO("TSP: cpu 0x%lx resumed. maximum off power level %" PRId64 "\n",
Achin Gupta9a0ff9b2015-09-07 20:43:27 +0100186 read_mpidr(), max_off_pwrlvl);
Manish Pandeyc4b47a22020-03-06 14:36:25 +0000187 INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu resume requests\n",
Soby Mathewda43b662015-07-08 21:45:46 +0100188 read_mpidr(),
Dan Handley91b624e2014-07-29 17:14:00 +0100189 tsp_stats[linear_id].smc_count,
190 tsp_stats[linear_id].eret_count,
Manish Pandeyc4b47a22020-03-06 14:36:25 +0000191 tsp_stats[linear_id].cpu_resume_count);
Achin Gupta607084e2014-02-09 18:24:19 +0000192 /* Indicate to the SPD that we have completed this request */
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000193 return set_smc_args(TSP_RESUME_DONE, 0, 0, 0, 0, 0, 0, 0);
194}
195
196/*******************************************************************************
197 * TSP fast smc handler. The secure monitor jumps to this function by
198 * doing the ERET after populating X0-X7 registers. The arguments are received
199 * in the function arguments in order. Once the service is rendered, this
Soby Mathew9f71f702014-05-09 20:49:17 +0100200 * function returns to Secure Monitor by raising SMC.
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000201 ******************************************************************************/
Achin Gupta6b4ec242021-10-04 20:13:36 +0100202smc_args_t *tsp_smc_handler(uint64_t func,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000203 uint64_t arg1,
204 uint64_t arg2,
205 uint64_t arg3,
206 uint64_t arg4,
207 uint64_t arg5,
208 uint64_t arg6,
209 uint64_t arg7)
210{
Alexei Fedorov7d616ee2020-11-13 12:36:49 +0000211 uint128_t service_args;
212 uint64_t service_arg0;
213 uint64_t service_arg1;
Achin Gupta916a2c12014-02-09 23:11:46 +0000214 uint64_t results[2];
Soby Mathewda43b662015-07-08 21:45:46 +0100215 uint32_t linear_id = plat_my_core_pos();
Daniel Boulby60786e72021-10-22 11:37:34 +0100216 u_register_t dit;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000217
Achin Gupta916a2c12014-02-09 23:11:46 +0000218 /* Update this cpu's statistics */
219 tsp_stats[linear_id].smc_count++;
220 tsp_stats[linear_id].eret_count++;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000221
Scott Brandene5dcf982020-08-25 13:49:32 -0700222 INFO("TSP: cpu 0x%lx received %s smc 0x%" PRIx64 "\n", read_mpidr(),
David Cunado28f69ab2017-04-05 11:34:03 +0100223 ((func >> 31) & 1) == 1 ? "fast" : "yielding",
Dan Handley91b624e2014-07-29 17:14:00 +0100224 func);
Soby Mathewda43b662015-07-08 21:45:46 +0100225 INFO("TSP: cpu 0x%lx: %d smcs, %d erets\n", read_mpidr(),
Dan Handley91b624e2014-07-29 17:14:00 +0100226 tsp_stats[linear_id].smc_count,
227 tsp_stats[linear_id].eret_count);
Achin Gupta916a2c12014-02-09 23:11:46 +0000228
229 /* Render secure services and obtain results here */
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000230 results[0] = arg1;
231 results[1] = arg2;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000232
233 /*
Alexei Fedorov7d616ee2020-11-13 12:36:49 +0000234 * Request a service back from dispatcher/secure monitor.
235 * This call returns and thereafter resumes execution.
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000236 */
Alexei Fedorov7d616ee2020-11-13 12:36:49 +0000237 service_args = tsp_get_magic();
238 service_arg0 = (uint64_t)service_args;
239 service_arg1 = (uint64_t)(service_args >> 64U);
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000240
Justin Chadwell1c7c13a2019-07-18 14:25:33 +0100241 /*
242 * Write a dummy value to an MTE register, to simulate usage in the
243 * secure world
244 */
Govindraj Rajad7b63ac2024-01-26 10:08:37 -0600245 if (is_feat_mte_supported()) {
246 write_gcr_el1(0x99);
247 }
Justin Chadwell1c7c13a2019-07-18 14:25:33 +0100248
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000249 /* Determine the function to perform based on the function ID */
Soby Mathew9f71f702014-05-09 20:49:17 +0100250 switch (TSP_BARE_FID(func)) {
251 case TSP_ADD:
Alexei Fedorov7d616ee2020-11-13 12:36:49 +0000252 results[0] += service_arg0;
253 results[1] += service_arg1;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000254 break;
Soby Mathew9f71f702014-05-09 20:49:17 +0100255 case TSP_SUB:
Alexei Fedorov7d616ee2020-11-13 12:36:49 +0000256 results[0] -= service_arg0;
257 results[1] -= service_arg1;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000258 break;
Soby Mathew9f71f702014-05-09 20:49:17 +0100259 case TSP_MUL:
Alexei Fedorov7d616ee2020-11-13 12:36:49 +0000260 results[0] *= service_arg0;
261 results[1] *= service_arg1;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000262 break;
Soby Mathew9f71f702014-05-09 20:49:17 +0100263 case TSP_DIV:
Alexei Fedorov7d616ee2020-11-13 12:36:49 +0000264 results[0] /= service_arg0 ? service_arg0 : 1;
265 results[1] /= service_arg1 ? service_arg1 : 1;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000266 break;
Daniel Boulby60786e72021-10-22 11:37:34 +0100267 case TSP_CHECK_DIT:
Andre Przywara1f55c412023-01-26 16:47:52 +0000268 if (!is_feat_dit_supported()) {
Daniel Boulby60786e72021-10-22 11:37:34 +0100269 ERROR("DIT not supported\n");
Daniel Boulby60786e72021-10-22 11:37:34 +0100270 results[0] = 0;
271 results[1] = 0xffff;
272 break;
273 }
274 dit = read_dit();
275 results[0] = dit == service_arg0;
276 results[1] = dit;
277 /* Toggle the dit bit */
278 write_dit(service_arg0 != 0U ? 0 : DIT_BIT);
279 break;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000280 default:
281 break;
282 }
283
Soby Mathew9f71f702014-05-09 20:49:17 +0100284 return set_smc_args(func, 0,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000285 results[0],
286 results[1],
Soby Mathew9f71f702014-05-09 20:49:17 +0100287 0, 0, 0, 0);
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000288}