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Lionel Debieve094ab3d2019-09-24 17:38:12 +02001/*
Yann Gautier442b2232022-02-14 09:56:54 +01002 * Copyright (c) 2019-2022, STMicroelectronics - All Rights Reserved
Lionel Debieve094ab3d2019-09-24 17:38:12 +02003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <assert.h>
Scott Brandene5dcf982020-08-25 13:49:32 -07008#include <inttypes.h>
9#include <stdint.h>
Lionel Debieve094ab3d2019-09-24 17:38:12 +020010
Lionel Debieve094ab3d2019-09-24 17:38:12 +020011#include <drivers/spi_mem.h>
12#include <lib/utils_def.h>
Yann Gautier442b2232022-02-14 09:56:54 +010013#include <libfdt.h>
Lionel Debieve094ab3d2019-09-24 17:38:12 +020014
15#define SPI_MEM_DEFAULT_SPEED_HZ 100000U
16
17/*
18 * struct spi_slave - Representation of a SPI slave.
19 *
20 * @max_hz: Maximum speed for this slave in Hertz.
21 * @cs: ID of the chip select connected to the slave.
22 * @mode: SPI mode to use for this slave (see SPI mode flags).
23 * @ops: Ops defined by the bus.
24 */
25struct spi_slave {
26 unsigned int max_hz;
27 unsigned int cs;
28 unsigned int mode;
29 const struct spi_bus_ops *ops;
30};
31
32static struct spi_slave spi_slave;
33
34static bool spi_mem_check_buswidth_req(uint8_t buswidth, bool tx)
35{
36 switch (buswidth) {
37 case 1U:
38 return true;
39
40 case 2U:
41 if ((tx && (spi_slave.mode & (SPI_TX_DUAL | SPI_TX_QUAD)) !=
42 0U) ||
43 (!tx && (spi_slave.mode & (SPI_RX_DUAL | SPI_RX_QUAD)) !=
44 0U)) {
45 return true;
46 }
47 break;
48
49 case 4U:
50 if ((tx && (spi_slave.mode & SPI_TX_QUAD) != 0U) ||
51 (!tx && (spi_slave.mode & SPI_RX_QUAD) != 0U)) {
52 return true;
53 }
54 break;
55
56 default:
57 break;
58 }
59
60 return false;
61}
62
63static bool spi_mem_supports_op(const struct spi_mem_op *op)
64{
65 if (!spi_mem_check_buswidth_req(op->cmd.buswidth, true)) {
66 return false;
67 }
68
69 if ((op->addr.nbytes != 0U) &&
70 !spi_mem_check_buswidth_req(op->addr.buswidth, true)) {
71 return false;
72 }
73
74 if ((op->dummy.nbytes != 0U) &&
75 !spi_mem_check_buswidth_req(op->dummy.buswidth, true)) {
76 return false;
77 }
78
79 if ((op->data.nbytes != 0U) &&
80 !spi_mem_check_buswidth_req(op->data.buswidth,
81 op->data.dir == SPI_MEM_DATA_OUT)) {
82 return false;
83 }
84
85 return true;
86}
87
88static int spi_mem_set_speed_mode(void)
89{
90 const struct spi_bus_ops *ops = spi_slave.ops;
91 int ret;
92
93 ret = ops->set_speed(spi_slave.max_hz);
94 if (ret != 0) {
95 VERBOSE("Cannot set speed (err=%d)\n", ret);
96 return ret;
97 }
98
99 ret = ops->set_mode(spi_slave.mode);
100 if (ret != 0) {
101 VERBOSE("Cannot set mode (err=%d)\n", ret);
102 return ret;
103 }
104
105 return 0;
106}
107
108static int spi_mem_check_bus_ops(const struct spi_bus_ops *ops)
109{
110 bool error = false;
111
112 if (ops->claim_bus == NULL) {
113 VERBOSE("Ops claim bus is not defined\n");
114 error = true;
115 }
116
117 if (ops->release_bus == NULL) {
118 VERBOSE("Ops release bus is not defined\n");
119 error = true;
120 }
121
122 if (ops->exec_op == NULL) {
123 VERBOSE("Ops exec op is not defined\n");
124 error = true;
125 }
126
127 if (ops->set_speed == NULL) {
128 VERBOSE("Ops set speed is not defined\n");
129 error = true;
130 }
131
132 if (ops->set_mode == NULL) {
133 VERBOSE("Ops set mode is not defined\n");
134 error = true;
135 }
136
137 return error ? -EINVAL : 0;
138}
139
140/*
141 * spi_mem_exec_op() - Execute a memory operation.
142 * @op: The memory operation to execute.
143 *
144 * This function first checks that @op is supported and then tries to execute
145 * it.
146 *
147 * Return: 0 in case of success, a negative error code otherwise.
148 */
149int spi_mem_exec_op(const struct spi_mem_op *op)
150{
151 const struct spi_bus_ops *ops = spi_slave.ops;
152 int ret;
153
Scott Brandene5dcf982020-08-25 13:49:32 -0700154 VERBOSE("%s: cmd:%x mode:%d.%d.%d.%d addqr:%" PRIx64 " len:%x\n",
Lionel Debieve094ab3d2019-09-24 17:38:12 +0200155 __func__, op->cmd.opcode, op->cmd.buswidth, op->addr.buswidth,
156 op->dummy.buswidth, op->data.buswidth,
157 op->addr.val, op->data.nbytes);
158
159 if (!spi_mem_supports_op(op)) {
160 WARN("Error in spi_mem_support\n");
161 return -ENOTSUP;
162 }
163
164 ret = ops->claim_bus(spi_slave.cs);
165 if (ret != 0) {
166 WARN("Error claim_bus\n");
167 return ret;
168 }
169
170 ret = ops->exec_op(op);
171
172 ops->release_bus();
173
174 return ret;
175}
176
177/*
178 * spi_mem_init_slave() - SPI slave device initialization.
179 * @fdt: Pointer to the device tree blob.
180 * @bus_node: Offset of the bus node.
181 * @ops: The SPI bus ops defined.
182 *
183 * This function first checks that @ops are supported and then tries to find
184 * a SPI slave device.
185 *
186 * Return: 0 in case of success, a negative error code otherwise.
187 */
188int spi_mem_init_slave(void *fdt, int bus_node, const struct spi_bus_ops *ops)
189{
190 int ret;
191 int mode = 0;
192 int nchips = 0;
193 int bus_subnode = 0;
194 const fdt32_t *cuint = NULL;
195
196 ret = spi_mem_check_bus_ops(ops);
197 if (ret != 0) {
198 return ret;
199 }
200
201 fdt_for_each_subnode(bus_subnode, fdt, bus_node) {
202 nchips++;
203 }
204
205 if (nchips != 1) {
206 ERROR("Only one SPI device is currently supported\n");
207 return -EINVAL;
208 }
209
210 fdt_for_each_subnode(bus_subnode, fdt, bus_node) {
211 /* Get chip select */
212 cuint = fdt_getprop(fdt, bus_subnode, "reg", NULL);
213 if (cuint == NULL) {
214 ERROR("Chip select not well defined\n");
215 return -EINVAL;
216 }
217 spi_slave.cs = fdt32_to_cpu(*cuint);
218
219 /* Get max slave frequency */
220 spi_slave.max_hz = SPI_MEM_DEFAULT_SPEED_HZ;
221 cuint = fdt_getprop(fdt, bus_subnode,
222 "spi-max-frequency", NULL);
223 if (cuint != NULL) {
224 spi_slave.max_hz = fdt32_to_cpu(*cuint);
225 }
226
227 /* Get mode */
228 if ((fdt_getprop(fdt, bus_subnode, "spi-cpol", NULL)) != NULL) {
229 mode |= SPI_CPOL;
230 }
231 if ((fdt_getprop(fdt, bus_subnode, "spi-cpha", NULL)) != NULL) {
232 mode |= SPI_CPHA;
233 }
234 if ((fdt_getprop(fdt, bus_subnode, "spi-cs-high", NULL)) !=
235 NULL) {
236 mode |= SPI_CS_HIGH;
237 }
238 if ((fdt_getprop(fdt, bus_subnode, "spi-3wire", NULL)) !=
239 NULL) {
240 mode |= SPI_3WIRE;
241 }
242 if ((fdt_getprop(fdt, bus_subnode, "spi-half-duplex", NULL)) !=
243 NULL) {
244 mode |= SPI_PREAMBLE;
245 }
246
247 /* Get dual/quad mode */
248 cuint = fdt_getprop(fdt, bus_subnode, "spi-tx-bus-width", NULL);
249 if (cuint != NULL) {
250 switch (fdt32_to_cpu(*cuint)) {
251 case 1U:
252 break;
253 case 2U:
254 mode |= SPI_TX_DUAL;
255 break;
256 case 4U:
257 mode |= SPI_TX_QUAD;
258 break;
259 default:
Yann Gautier442b2232022-02-14 09:56:54 +0100260 WARN("spi-tx-bus-width %u not supported\n",
Lionel Debieve094ab3d2019-09-24 17:38:12 +0200261 fdt32_to_cpu(*cuint));
262 return -EINVAL;
263 }
264 }
265
266 cuint = fdt_getprop(fdt, bus_subnode, "spi-rx-bus-width", NULL);
267 if (cuint != NULL) {
268 switch (fdt32_to_cpu(*cuint)) {
269 case 1U:
270 break;
271 case 2U:
272 mode |= SPI_RX_DUAL;
273 break;
274 case 4U:
275 mode |= SPI_RX_QUAD;
276 break;
277 default:
Yann Gautier442b2232022-02-14 09:56:54 +0100278 WARN("spi-rx-bus-width %u not supported\n",
Lionel Debieve094ab3d2019-09-24 17:38:12 +0200279 fdt32_to_cpu(*cuint));
280 return -EINVAL;
281 }
282 }
283
284 spi_slave.mode = mode;
285 spi_slave.ops = ops;
286 }
287
288 return spi_mem_set_speed_mode();
289}