blob: 25eed5938cf3c129ad1fbb3b4c04b5889d964795 [file] [log] [blame]
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +02001/*
Joel Hutton5cc3bc82018-03-21 11:40:57 +00002 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +02003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch_helpers.h>
8#include <assert.h>
9#include <bl_common.h>
10#include <console.h>
11#include <debug.h>
Victor Chong539408d2018-01-03 01:53:08 +090012#include <dw_mmc.h>
13#include <emmc.h>
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020014#include <errno.h>
15#include <generic_delay_timer.h>
16#include <mmio.h>
17#include <pl061_gpio.h>
18#include <platform.h>
19#include <platform_def.h>
20#include <string.h>
21#include <tbbr_img_def.h>
22#include "../../bl1/bl1_private.h"
23#include "hi3798cv200.h"
24#include "plat_private.h"
25
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020026/* Data structure which holds the extents of the trusted RAM for BL1 */
27static meminfo_t bl1_tzram_layout;
28
29meminfo_t *bl1_plat_sec_mem_layout(void)
30{
31 return &bl1_tzram_layout;
32}
33
Victor Chong175dd8a2018-02-01 00:35:22 +090034#if LOAD_IMAGE_V2
35/*******************************************************************************
36 * Function that takes a memory layout into which BL2 has been loaded and
37 * populates a new memory layout for BL2 that ensures that BL1's data sections
38 * resident in secure RAM are not visible to BL2.
39 ******************************************************************************/
40void bl1_init_bl2_mem_layout(const meminfo_t *bl1_mem_layout,
41 meminfo_t *bl2_mem_layout)
42{
43
44 assert(bl1_mem_layout != NULL);
45 assert(bl2_mem_layout != NULL);
46
47 /*
48 * Cannot use default weak implementation in bl1main.c because
49 * BL1 RW data is not at the top of bl1_mem_layout
50 */
51 bl2_mem_layout->total_base = BL2_BASE;
52 bl2_mem_layout->total_size = BL32_LIMIT - BL2_BASE;
53
54 flush_dcache_range((unsigned long)bl2_mem_layout, sizeof(meminfo_t));
55}
56#endif /* LOAD_IMAGE_V2 */
57
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020058void bl1_early_platform_setup(void)
59{
60 /* Initialize the console to provide early debug support */
61 console_init(PL011_UART0_BASE, PL011_UART0_CLK_IN_HZ, PL011_BAUDRATE);
62
63 /* Allow BL1 to see the whole Trusted RAM */
Victor Chong175dd8a2018-02-01 00:35:22 +090064 bl1_tzram_layout.total_base = BL1_RW_BASE;
65 bl1_tzram_layout.total_size = BL1_RW_SIZE;
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020066
Victor Chong175dd8a2018-02-01 00:35:22 +090067#if !LOAD_IMAGE_V2
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020068 /* Calculate how much RAM BL1 is using and how much remains free */
Victor Chong175dd8a2018-02-01 00:35:22 +090069 bl1_tzram_layout.free_base = BL1_RW_BASE;
70 bl1_tzram_layout.free_size = BL1_RW_SIZE;
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020071
72 reserve_mem(&bl1_tzram_layout.free_base,
73 &bl1_tzram_layout.free_size,
74 BL1_RAM_BASE,
75 BL1_RAM_LIMIT - BL1_RAM_BASE);
Victor Chong175dd8a2018-02-01 00:35:22 +090076#endif
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020077
78 INFO("BL1: 0x%lx - 0x%lx [size = %zu]\n", BL1_RAM_BASE, BL1_RAM_LIMIT,
79 BL1_RAM_LIMIT - BL1_RAM_BASE);
80}
81
82void bl1_plat_arch_setup(void)
83{
84 plat_configure_mmu_el3(bl1_tzram_layout.total_base,
85 bl1_tzram_layout.total_size,
Victor Chong175dd8a2018-02-01 00:35:22 +090086 BL1_RO_BASE, /* l-loader and BL1 ROM */
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020087 BL1_RO_LIMIT,
Joel Hutton5cc3bc82018-03-21 11:40:57 +000088 BL_COHERENT_RAM_BASE,
89 BL_COHERENT_RAM_END);
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020090}
91
92void bl1_platform_setup(void)
93{
94 int i;
Victor Chongf0c7c612018-01-16 00:29:47 +090095#if !POPLAR_RECOVERY
Victor Chong539408d2018-01-03 01:53:08 +090096 dw_mmc_params_t params = EMMC_INIT_PARAMS(POPLAR_EMMC_DESC_BASE);
Victor Chongf0c7c612018-01-16 00:29:47 +090097#endif
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +020098
99 generic_delay_timer_init();
100
101 pl061_gpio_init();
102 for (i = 0; i < GPIO_MAX; i++)
103 pl061_gpio_register(GPIO_BASE(i), i);
104
Victor Chongf0c7c612018-01-16 00:29:47 +0900105#if !POPLAR_RECOVERY
Victor Chong539408d2018-01-03 01:53:08 +0900106 /* SoC-specific emmc register are initialized/configured by bootrom */
107 INFO("BL1: initializing emmc\n");
108 dw_mmc_init(&params);
Victor Chongf0c7c612018-01-16 00:29:47 +0900109#endif
Victor Chong539408d2018-01-03 01:53:08 +0900110
Jorge Ramirez-Ortiza29d9a62017-06-28 10:11:31 +0200111 plat_io_setup();
112}
113
114unsigned int bl1_plat_get_next_image_id(void)
115{
116 return BL2_IMAGE_ID;
117}