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Achin Gupta7c88f3f2014-02-18 18:09:12 +00001/*
2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Achin Gupta7c88f3f2014-02-18 18:09:12 +000031#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010032#include <bl_common.h>
Achin Gupta7c88f3f2014-02-18 18:09:12 +000033#include <debug.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010034#include <platform.h>
Dan Handleyed6ff952014-05-14 17:44:19 +010035#include <platform_def.h>
Achin Gupta7c88f3f2014-02-18 18:09:12 +000036#include <spinlock.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010037#include <stdio.h>
38#include <tsp.h>
Achin Gupta7c88f3f2014-02-18 18:09:12 +000039
40/*******************************************************************************
Vikram Kanigirid8c9d262014-05-16 18:48:12 +010041 * Declarations of linker defined symbols which will help us find the layout
42 * of trusted SRAM
43 ******************************************************************************/
44extern unsigned long __RO_START__;
45extern unsigned long __COHERENT_RAM_END__;
46
47/*******************************************************************************
Achin Gupta7c88f3f2014-02-18 18:09:12 +000048 * Lock to control access to the console
49 ******************************************************************************/
50spinlock_t console_lock;
51
52/*******************************************************************************
53 * Per cpu data structure to populate parameters for an SMC in C code and use
54 * a pointer to this structure in assembler code to populate x0-x7
55 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +010056static tsp_args_t tsp_smc_args[PLATFORM_CORE_COUNT];
Achin Gupta7c88f3f2014-02-18 18:09:12 +000057
58/*******************************************************************************
59 * Per cpu data structure to keep track of TSP activity
60 ******************************************************************************/
Achin Gupta76717892014-05-09 11:42:56 +010061work_statistics_t tsp_stats[PLATFORM_CORE_COUNT];
Achin Gupta7c88f3f2014-02-18 18:09:12 +000062
63/*******************************************************************************
Vikram Kanigirid8c9d262014-05-16 18:48:12 +010064 * The BL32 memory footprint starts with an RO sections and ends
65 * with a section for coherent RAM. Use it to find the memory size
66 ******************************************************************************/
67#define BL32_TOTAL_BASE (unsigned long)(&__RO_START__)
68
69#define BL32_TOTAL_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
70
Dan Handleye2712bc2014-04-10 15:37:22 +010071static tsp_args_t *set_smc_args(uint64_t arg0,
Achin Gupta7c88f3f2014-02-18 18:09:12 +000072 uint64_t arg1,
73 uint64_t arg2,
74 uint64_t arg3,
75 uint64_t arg4,
76 uint64_t arg5,
77 uint64_t arg6,
78 uint64_t arg7)
79{
80 uint64_t mpidr = read_mpidr();
81 uint32_t linear_id;
Dan Handleye2712bc2014-04-10 15:37:22 +010082 tsp_args_t *pcpu_smc_args;
Achin Gupta7c88f3f2014-02-18 18:09:12 +000083
84 /*
85 * Return to Secure Monitor by raising an SMC. The results of the
86 * service are passed as an arguments to the SMC
87 */
88 linear_id = platform_get_core_pos(mpidr);
89 pcpu_smc_args = &tsp_smc_args[linear_id];
90 write_sp_arg(pcpu_smc_args, TSP_ARG0, arg0);
91 write_sp_arg(pcpu_smc_args, TSP_ARG1, arg1);
92 write_sp_arg(pcpu_smc_args, TSP_ARG2, arg2);
93 write_sp_arg(pcpu_smc_args, TSP_ARG3, arg3);
94 write_sp_arg(pcpu_smc_args, TSP_ARG4, arg4);
95 write_sp_arg(pcpu_smc_args, TSP_ARG5, arg5);
96 write_sp_arg(pcpu_smc_args, TSP_ARG6, arg6);
97 write_sp_arg(pcpu_smc_args, TSP_ARG7, arg7);
98
99 return pcpu_smc_args;
100}
101
102/*******************************************************************************
103 * TSP main entry point where it gets the opportunity to initialize its secure
104 * state/applications. Once the state is initialized, it must return to the
Andrew Thoelke891c4ca2014-05-20 21:43:27 +0100105 * SPD with a pointer to the 'tsp_vector_table' jump table.
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000106 ******************************************************************************/
107uint64_t tsp_main(void)
108{
109 uint64_t mpidr = read_mpidr();
110 uint32_t linear_id = platform_get_core_pos(mpidr);
111
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000112 /* Initialize the platform */
113 bl32_platform_setup();
114
115 /* Initialize secure/applications state here */
Achin Guptabbc33f22014-05-09 13:33:42 +0100116 tsp_generic_timer_start();
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000117
118 /* Update this cpu's statistics */
119 tsp_stats[linear_id].smc_count++;
120 tsp_stats[linear_id].eret_count++;
121 tsp_stats[linear_id].cpu_on_count++;
122
123 spin_lock(&console_lock);
Jon Medhurstecf0a712014-02-17 12:18:24 +0000124 printf("TSP %s\n\r", build_message);
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100125 INFO("Total memory base : 0x%x\n", (unsigned long)BL32_TOTAL_BASE);
126 INFO("Total memory size : 0x%x bytes\n",
127 (unsigned long)(BL32_TOTAL_LIMIT - BL32_TOTAL_BASE));
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000128 INFO("cpu 0x%x: %d smcs, %d erets %d cpu on requests\n", mpidr,
129 tsp_stats[linear_id].smc_count,
130 tsp_stats[linear_id].eret_count,
131 tsp_stats[linear_id].cpu_on_count);
132 spin_unlock(&console_lock);
133
Andrew Thoelke891c4ca2014-05-20 21:43:27 +0100134 return (uint64_t) &tsp_vector_table;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000135}
136
137/*******************************************************************************
138 * This function performs any remaining book keeping in the test secure payload
139 * after this cpu's architectural state has been setup in response to an earlier
140 * psci cpu_on request.
141 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100142tsp_args_t *tsp_cpu_on_main(void)
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000143{
144 uint64_t mpidr = read_mpidr();
145 uint32_t linear_id = platform_get_core_pos(mpidr);
146
Achin Guptabbc33f22014-05-09 13:33:42 +0100147 /* Initialize secure/applications state here */
148 tsp_generic_timer_start();
149
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000150 /* Update this cpu's statistics */
151 tsp_stats[linear_id].smc_count++;
152 tsp_stats[linear_id].eret_count++;
153 tsp_stats[linear_id].cpu_on_count++;
154
155 spin_lock(&console_lock);
156 printf("SP: cpu 0x%x turned on\n\r", mpidr);
157 INFO("cpu 0x%x: %d smcs, %d erets %d cpu on requests\n", mpidr,
158 tsp_stats[linear_id].smc_count,
159 tsp_stats[linear_id].eret_count,
160 tsp_stats[linear_id].cpu_on_count);
161 spin_unlock(&console_lock);
162
163 /* Indicate to the SPD that we have completed turned ourselves on */
164 return set_smc_args(TSP_ON_DONE, 0, 0, 0, 0, 0, 0, 0);
165}
166
167/*******************************************************************************
168 * This function performs any remaining book keeping in the test secure payload
169 * before this cpu is turned off in response to a psci cpu_off request.
170 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100171tsp_args_t *tsp_cpu_off_main(uint64_t arg0,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000172 uint64_t arg1,
173 uint64_t arg2,
174 uint64_t arg3,
175 uint64_t arg4,
176 uint64_t arg5,
177 uint64_t arg6,
178 uint64_t arg7)
179{
180 uint64_t mpidr = read_mpidr();
181 uint32_t linear_id = platform_get_core_pos(mpidr);
182
Achin Guptabbc33f22014-05-09 13:33:42 +0100183 /*
184 * This cpu is being turned off, so disable the timer to prevent the
185 * secure timer interrupt from interfering with power down. A pending
186 * interrupt will be lost but we do not care as we are turning off.
187 */
188 tsp_generic_timer_stop();
189
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000190 /* Update this cpu's statistics */
191 tsp_stats[linear_id].smc_count++;
192 tsp_stats[linear_id].eret_count++;
193 tsp_stats[linear_id].cpu_off_count++;
194
195 spin_lock(&console_lock);
196 printf("SP: cpu 0x%x off request\n\r", mpidr);
197 INFO("cpu 0x%x: %d smcs, %d erets %d cpu off requests\n", mpidr,
198 tsp_stats[linear_id].smc_count,
199 tsp_stats[linear_id].eret_count,
200 tsp_stats[linear_id].cpu_off_count);
201 spin_unlock(&console_lock);
202
203
Achin Gupta607084e2014-02-09 18:24:19 +0000204 /* Indicate to the SPD that we have completed this request */
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000205 return set_smc_args(TSP_OFF_DONE, 0, 0, 0, 0, 0, 0, 0);
206}
207
208/*******************************************************************************
209 * This function performs any book keeping in the test secure payload before
210 * this cpu's architectural state is saved in response to an earlier psci
211 * cpu_suspend request.
212 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100213tsp_args_t *tsp_cpu_suspend_main(uint64_t power_state,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000214 uint64_t arg1,
215 uint64_t arg2,
216 uint64_t arg3,
217 uint64_t arg4,
218 uint64_t arg5,
219 uint64_t arg6,
220 uint64_t arg7)
221{
222 uint64_t mpidr = read_mpidr();
223 uint32_t linear_id = platform_get_core_pos(mpidr);
224
Achin Guptabbc33f22014-05-09 13:33:42 +0100225 /*
226 * Save the time context and disable it to prevent the secure timer
227 * interrupt from interfering with wakeup from the suspend state.
228 */
229 tsp_generic_timer_save();
230 tsp_generic_timer_stop();
231
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000232 /* Update this cpu's statistics */
233 tsp_stats[linear_id].smc_count++;
234 tsp_stats[linear_id].eret_count++;
235 tsp_stats[linear_id].cpu_suspend_count++;
236
237 spin_lock(&console_lock);
238 printf("SP: cpu 0x%x suspend request. power state: 0x%x\n\r",
239 mpidr, power_state);
240 INFO("cpu 0x%x: %d smcs, %d erets %d cpu suspend requests\n", mpidr,
241 tsp_stats[linear_id].smc_count,
242 tsp_stats[linear_id].eret_count,
243 tsp_stats[linear_id].cpu_suspend_count);
244 spin_unlock(&console_lock);
245
Achin Gupta607084e2014-02-09 18:24:19 +0000246 /* Indicate to the SPD that we have completed this request */
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000247 return set_smc_args(TSP_SUSPEND_DONE, 0, 0, 0, 0, 0, 0, 0);
248}
249
250/*******************************************************************************
251 * This function performs any book keeping in the test secure payload after this
252 * cpu's architectural state has been restored after wakeup from an earlier psci
253 * cpu_suspend request.
254 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100255tsp_args_t *tsp_cpu_resume_main(uint64_t suspend_level,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000256 uint64_t arg1,
257 uint64_t arg2,
258 uint64_t arg3,
259 uint64_t arg4,
260 uint64_t arg5,
261 uint64_t arg6,
262 uint64_t arg7)
263{
264 uint64_t mpidr = read_mpidr();
265 uint32_t linear_id = platform_get_core_pos(mpidr);
266
Achin Guptabbc33f22014-05-09 13:33:42 +0100267 /* Restore the generic timer context */
268 tsp_generic_timer_restore();
269
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000270 /* Update this cpu's statistics */
271 tsp_stats[linear_id].smc_count++;
272 tsp_stats[linear_id].eret_count++;
273 tsp_stats[linear_id].cpu_resume_count++;
274
275 spin_lock(&console_lock);
276 printf("SP: cpu 0x%x resumed. suspend level %d \n\r",
277 mpidr, suspend_level);
278 INFO("cpu 0x%x: %d smcs, %d erets %d cpu suspend requests\n", mpidr,
279 tsp_stats[linear_id].smc_count,
280 tsp_stats[linear_id].eret_count,
281 tsp_stats[linear_id].cpu_suspend_count);
282 spin_unlock(&console_lock);
283
Achin Gupta607084e2014-02-09 18:24:19 +0000284 /* Indicate to the SPD that we have completed this request */
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000285 return set_smc_args(TSP_RESUME_DONE, 0, 0, 0, 0, 0, 0, 0);
286}
287
288/*******************************************************************************
289 * TSP fast smc handler. The secure monitor jumps to this function by
290 * doing the ERET after populating X0-X7 registers. The arguments are received
291 * in the function arguments in order. Once the service is rendered, this
Soby Mathew9f71f702014-05-09 20:49:17 +0100292 * function returns to Secure Monitor by raising SMC.
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000293 ******************************************************************************/
Soby Mathew9f71f702014-05-09 20:49:17 +0100294tsp_args_t *tsp_smc_handler(uint64_t func,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000295 uint64_t arg1,
296 uint64_t arg2,
297 uint64_t arg3,
298 uint64_t arg4,
299 uint64_t arg5,
300 uint64_t arg6,
301 uint64_t arg7)
302{
Achin Gupta916a2c12014-02-09 23:11:46 +0000303 uint64_t results[2];
304 uint64_t service_args[2];
305 uint64_t mpidr = read_mpidr();
306 uint32_t linear_id = platform_get_core_pos(mpidr);
Soby Mathew9f71f702014-05-09 20:49:17 +0100307 const char *smc_type;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000308
Achin Gupta916a2c12014-02-09 23:11:46 +0000309 /* Update this cpu's statistics */
310 tsp_stats[linear_id].smc_count++;
311 tsp_stats[linear_id].eret_count++;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000312
Soby Mathew9f71f702014-05-09 20:49:17 +0100313 smc_type = ((func >> 31) & 1) == 1 ? "fast" : "standard";
314
315 printf("SP: cpu 0x%x received %s smc 0x%x\n", read_mpidr(), smc_type, func);
Achin Gupta916a2c12014-02-09 23:11:46 +0000316 INFO("cpu 0x%x: %d smcs, %d erets\n", mpidr,
317 tsp_stats[linear_id].smc_count,
318 tsp_stats[linear_id].eret_count);
319
320 /* Render secure services and obtain results here */
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000321 results[0] = arg1;
322 results[1] = arg2;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000323
324 /*
325 * Request a service back from dispatcher/secure monitor. This call
326 * return and thereafter resume exectuion
327 */
328 tsp_get_magic(service_args);
329
330 /* Determine the function to perform based on the function ID */
Soby Mathew9f71f702014-05-09 20:49:17 +0100331 switch (TSP_BARE_FID(func)) {
332 case TSP_ADD:
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000333 results[0] += service_args[0];
334 results[1] += service_args[1];
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000335 break;
Soby Mathew9f71f702014-05-09 20:49:17 +0100336 case TSP_SUB:
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000337 results[0] -= service_args[0];
338 results[1] -= service_args[1];
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000339 break;
Soby Mathew9f71f702014-05-09 20:49:17 +0100340 case TSP_MUL:
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000341 results[0] *= service_args[0];
342 results[1] *= service_args[1];
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000343 break;
Soby Mathew9f71f702014-05-09 20:49:17 +0100344 case TSP_DIV:
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000345 results[0] /= service_args[0] ? service_args[0] : 1;
346 results[1] /= service_args[1] ? service_args[1] : 1;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000347 break;
348 default:
349 break;
350 }
351
Soby Mathew9f71f702014-05-09 20:49:17 +0100352 return set_smc_args(func, 0,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000353 results[0],
354 results[1],
Soby Mathew9f71f702014-05-09 20:49:17 +0100355 0, 0, 0, 0);
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000356}
357