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Vikram Kanigirifbb13012016-02-15 11:54:14 +00001/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Vikram Kanigirifbb13012016-02-15 11:54:14 +00005 */
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00006#ifndef CCI_MACROS_S
7#define CCI_MACROS_S
Vikram Kanigirifbb13012016-02-15 11:54:14 +00008
9#include <cci.h>
10#include <platform_def.h>
11
12.section .rodata.cci_reg_name, "aS"
13cci_iface_regs:
14 .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
15
16 /* ------------------------------------------------
17 * The below required platform porting macro prints
18 * out relevant interconnect registers whenever an
19 * unhandled exception is taken in BL31.
20 * Clobbers: x0 - x9, sp
21 * ------------------------------------------------
22 */
Gerald Lejeune2c7ed5b2015-11-26 15:47:53 +010023 .macro print_cci_regs
Vikram Kanigirifbb13012016-02-15 11:54:14 +000024 adr x6, cci_iface_regs
25 /* Store in x7 the base address of the first interface */
26 mov_imm x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET( \
27 PLAT_ARM_CCI_CLUSTER0_SL_IFACE_IX))
28 ldr w8, [x7, #SNOOP_CTRL_REG]
29 /* Store in x7 the base address of the second interface */
30 mov_imm x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET( \
31 PLAT_ARM_CCI_CLUSTER1_SL_IFACE_IX))
32 ldr w9, [x7, #SNOOP_CTRL_REG]
33 /* Store to the crash buf and print to console */
34 bl str_in_crash_buf_print
35 .endm
36
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000037#endif /* CCI_MACROS_S */