| developer | 312ade3 | 2022-11-15 20:33:18 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2023, MediaTek Inc. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef MT_SPM_SSPM_INTC_H |
| 8 | #define MT_SPM_SSPM_INTC_H |
| 9 | |
| 10 | #include <mt_spm_reg.h> |
| 11 | |
| 12 | #define MT_SPM_SSPM_INTC_SEL_0 (0x10) |
| 13 | #define MT_SPM_SSPM_INTC_SEL_1 (0x20) |
| 14 | #define MT_SPM_SSPM_INTC_SEL_2 (0x40) |
| 15 | #define MT_SPM_SSPM_INTC_SEL_3 (0x80) |
| 16 | |
| 17 | #define MT_SPM_SSPM_INTC_TRIGGER(id, sg) (((0x10 << (id)) | (sg << (id))) & 0xFF) |
| 18 | |
| 19 | #define MT_SPM_SSPM_INTC0_HIGH MT_SPM_SSPM_INTC_TRIGGER(0, 1) |
| 20 | #define MT_SPM_SSPM_INTC0_LOW MT_SPM_SSPM_INTC_TRIGGER(0, 0) |
| 21 | |
| 22 | #define MT_SPM_SSPM_INTC1_HIGH MT_SPM_SSPM_INTC_TRIGGER(1, 1) |
| 23 | #define MT_SPM_SSPM_INTC1_LOW MT_SPM_SSPM_INTC_TRIGGER(1, 0) |
| 24 | |
| 25 | #define MT_SPM_SSPM_INTC2_HIGH MT_SPM_SSPM_INTC_TRIGGER(2, 1) |
| 26 | #define MT_SPM_SSPM_INTC2_LOW MT_SPM_SSPM_INTC_TRIGGER(2, 0) |
| 27 | |
| 28 | #define MT_SPM_SSPM_INTC3_HIGH MT_SPM_SSPM_INTC_TRIGGER(3, 1) |
| 29 | #define MT_SPM_SSPM_INTC3_LOW MT_SPM_SSPM_INTC_TRIGGER(3, 0) |
| 30 | |
| 31 | #define DO_SPM_SSPM_LP_SUSPEND() mmio_write_32(SPM_MD32_IRQ, MT_SPM_SSPM_INTC0_HIGH) |
| 32 | |
| 33 | #define DO_SPM_SSPM_LP_RESUME() mmio_write_32(SPM_MD32_IRQ, MT_SPM_SSPM_INTC0_LOW) |
| 34 | |
| 35 | #endif /* MT_SPM_SSPM_INTC_H */ |