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Antonio Nino Diazc326c342019-01-11 11:20:10 +00001/*
Daniel Boulby60786e72021-10-22 11:37:34 +01002 * Copyright (c) 2019-2022, Arm Limited. All rights reserved.
Antonio Nino Diazc326c342019-01-11 11:20:10 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef ARCH_FEATURES_H
8#define ARCH_FEATURES_H
9
10#include <stdbool.h>
11
12#include <arch_helpers.h>
Andre Przywarae8920f62022-11-10 14:28:01 +000013#include <common/feat_detect.h>
Antonio Nino Diazc326c342019-01-11 11:20:10 +000014
Antonio Nino Diazd29d21e2019-02-06 09:23:04 +000015static inline bool is_armv7_gentimer_present(void)
16{
17 /* The Generic Timer is always present in an ARMv8-A implementation */
18 return true;
19}
20
Daniel Boulby44b43332020-11-25 16:36:46 +000021static inline bool is_armv8_1_pan_present(void)
22{
23 return ((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_PAN_SHIFT) &
24 ID_AA64MMFR1_EL1_PAN_MASK) != 0U;
25}
26
27static inline bool is_armv8_1_vhe_present(void)
28{
29 return ((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_VHE_SHIFT) &
30 ID_AA64MMFR1_EL1_VHE_MASK) != 0U;
31}
32
Antonio Nino Diazc326c342019-01-11 11:20:10 +000033static inline bool is_armv8_2_ttcnp_present(void)
34{
35 return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_CNP_SHIFT) &
36 ID_AA64MMFR2_EL1_CNP_MASK) != 0U;
37}
38
Juan Pablo Condee089a172022-06-29 17:44:43 -040039static inline bool is_feat_pacqarma3_present(void)
40{
41 uint64_t mask_id_aa64isar2 =
42 (ID_AA64ISAR2_GPA3_MASK << ID_AA64ISAR2_GPA3_SHIFT) |
43 (ID_AA64ISAR2_APA3_MASK << ID_AA64ISAR2_APA3_SHIFT);
44
45 /* If any of the fields is not zero, QARMA3 algorithm is present */
46 return (read_id_aa64isar2_el1() & mask_id_aa64isar2) != 0U;
47}
48
Antonio Nino Diaz25cda672019-02-19 11:53:51 +000049static inline bool is_armv8_3_pauth_present(void)
50{
Juan Pablo Condee089a172022-06-29 17:44:43 -040051 uint64_t mask_id_aa64isar1 =
52 (ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) |
53 (ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) |
54 (ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) |
55 (ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT);
Antonio Nino Diaz25cda672019-02-19 11:53:51 +000056
Juan Pablo Condee089a172022-06-29 17:44:43 -040057 /*
58 * If any of the fields is not zero or QARMA3 is present,
59 * PAuth is present
60 */
61 return ((read_id_aa64isar1_el1() & mask_id_aa64isar1) != 0U ||
62 is_feat_pacqarma3_present());
Antonio Nino Diaz25cda672019-02-19 11:53:51 +000063}
64
Daniel Boulby60786e72021-10-22 11:37:34 +010065static inline bool is_armv8_4_dit_present(void)
66{
67 return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) &
68 ID_AA64PFR0_DIT_MASK) == 1U;
69}
70
Sathees Balya74155972019-01-25 11:36:01 +000071static inline bool is_armv8_4_ttst_present(void)
72{
73 return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) &
74 ID_AA64MMFR2_EL1_ST_MASK) == 1U;
75}
76
Alexei Fedorov90f2e882019-05-24 12:17:09 +010077static inline bool is_armv8_5_bti_present(void)
78{
79 return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_BT_SHIFT) &
80 ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED;
81}
82
Soby Mathew830f0ad2019-07-12 09:23:38 +010083static inline unsigned int get_armv8_5_mte_support(void)
84{
85 return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) &
86 ID_AA64PFR1_EL1_MTE_MASK);
87}
88
Olivier Deprez2bae35f2020-04-16 13:39:06 +020089static inline bool is_armv8_4_sel2_present(void)
90{
91 return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SEL2_SHIFT) &
92 ID_AA64PFR0_SEL2_MASK) == 1ULL;
93}
94
johpow013e24c162020-04-22 14:05:13 -050095static inline bool is_armv8_6_twed_present(void)
96{
97 return (((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_TWED_SHIFT) &
98 ID_AA64MMFR1_EL1_TWED_MASK) == ID_AA64MMFR1_EL1_TWED_SUPPORTED);
99}
100
Andre Przywarae8920f62022-11-10 14:28:01 +0000101static unsigned int read_feat_fgt_id_field(void)
Jimmy Brissonecc3c672020-04-16 10:47:56 -0500102{
Andre Przywarae8920f62022-11-10 14:28:01 +0000103 return (read_id_aa64mmfr0_el1() >> ID_AA64MMFR0_EL1_FGT_SHIFT) &
104 ID_AA64MMFR0_EL1_FGT_MASK;
105}
106
107static inline bool is_feat_fgt_supported(void)
108{
109 if (ENABLE_FEAT_FGT == FEAT_STATE_DISABLED) {
110 return false;
111 }
112
113 if (ENABLE_FEAT_FGT == FEAT_STATE_ALWAYS) {
114 return true;
115 }
116
117 return read_feat_fgt_id_field() != 0U;
Jimmy Brissonecc3c672020-04-16 10:47:56 -0500118}
119
Jimmy Brisson83573892020-04-16 10:48:02 -0500120static inline unsigned long int get_armv8_6_ecv_support(void)
121{
122 return ((read_id_aa64mmfr0_el1() >> ID_AA64MMFR0_EL1_ECV_SHIFT) &
123 ID_AA64MMFR0_EL1_ECV_MASK);
124}
125
Tomas Pilar6fd816e2020-10-28 15:34:12 +0000126static inline bool is_armv8_5_rng_present(void)
127{
128 return ((read_id_aa64isar0_el1() >> ID_AA64ISAR0_RNDR_SHIFT) &
129 ID_AA64ISAR0_RNDR_MASK);
130}
131
Andre Przywara2c550e32022-11-10 14:41:07 +0000132/*******************************************************************************
133 * Functions to identify the presence of the Activity Monitors Extension
134 ******************************************************************************/
135static unsigned int read_feat_amu_id_field(void)
136{
137 return (read_id_aa64pfr0_el1() >> ID_AA64PFR0_AMU_SHIFT) &
138 ID_AA64PFR0_AMU_MASK;
139}
140
141static inline bool is_feat_amu_supported(void)
142{
143 if (ENABLE_FEAT_AMUv1 == FEAT_STATE_DISABLED) {
144 return false;
145 }
146
147 if (ENABLE_FEAT_AMUv1 == FEAT_STATE_ALWAYS) {
148 return true;
149 }
150
151 return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1;
152}
153
johpow01fa59c6f2020-10-02 13:41:11 -0500154static inline bool is_armv8_6_feat_amuv1p1_present(void)
155{
Andre Przywara2c550e32022-11-10 14:41:07 +0000156 return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1P1;
johpow01fa59c6f2020-10-02 13:41:11 -0500157}
158
Alexei Fedorov19933552020-05-26 13:16:41 +0100159/*
160 * Return MPAM version:
161 *
162 * 0x00: None Armv8.0 or later
163 * 0x01: v0.1 Armv8.4 or later
164 * 0x10: v1.0 Armv8.2 or later
165 * 0x11: v1.1 Armv8.4 or later
166 *
167 */
168static inline unsigned int get_mpam_version(void)
169{
170 return (unsigned int)((((read_id_aa64pfr0_el1() >>
171 ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) |
172 ((read_id_aa64pfr1_el1() >>
173 ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK));
174}
175
Andre Przywaraf20ad902022-11-15 11:45:19 +0000176static inline unsigned int read_feat_hcx_id_field(void)
177{
178 return (read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_HCX_SHIFT) &
179 ID_AA64MMFR1_EL1_HCX_MASK;
180}
181
182static inline bool is_feat_hcx_supported(void)
johpow01f91e59f2021-08-04 19:38:18 -0500183{
Andre Przywaraf20ad902022-11-15 11:45:19 +0000184 if (ENABLE_FEAT_HCX == FEAT_STATE_DISABLED) {
185 return false;
186 }
187
188 if (ENABLE_FEAT_HCX == FEAT_STATE_ALWAYS) {
189 return true;
190 }
191
192 return read_feat_hcx_id_field() != 0U;
johpow01f91e59f2021-08-04 19:38:18 -0500193}
194
Juan Pablo Conde42305f22022-07-12 16:40:29 -0400195static inline bool is_feat_rng_trap_present(void)
196{
197 return (((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT) &
198 ID_AA64PFR1_EL1_RNDR_TRAP_MASK)
199 == ID_AA64PFR1_EL1_RNG_TRAP_SUPPORTED);
200}
201
Zelalem Aweke79e3d292021-07-08 16:51:14 -0500202static inline unsigned int get_armv9_2_feat_rme_support(void)
203{
204 /*
205 * Return the RME version, zero if not supported. This function can be
206 * used as both an integer value for the RME version or compared to zero
207 * to detect RME presence.
208 */
209 return (unsigned int)(read_id_aa64pfr0_el1() >>
210 ID_AA64PFR0_FEAT_RME_SHIFT) & ID_AA64PFR0_FEAT_RME_MASK;
211}
212
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000213/*********************************************************************************
214 * Function to identify the presence of FEAT_SB (Speculation Barrier Instruction)
215 ********************************************************************************/
216static inline bool is_armv8_0_feat_sb_present(void)
217{
218 return (((read_id_aa64isar1_el1() >> ID_AA64ISAR1_SB_SHIFT) &
219 ID_AA64ISAR1_SB_MASK) == ID_AA64ISAR1_SB_SUPPORTED);
220}
221
222/*********************************************************************************
223 * Function to identify the presence of FEAT_CSV2_2 (Cache Speculation Variant 2)
224 ********************************************************************************/
225static inline bool is_armv8_0_feat_csv2_2_present(void)
226{
227 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_CSV2_SHIFT) &
228 ID_AA64PFR0_CSV2_MASK) == ID_AA64PFR0_CSV2_2_SUPPORTED);
229}
230
231/**********************************************************************************
232 * Function to identify the presence of FEAT_SPE (Statistical Profiling Extension)
233 *********************************************************************************/
234static inline bool is_armv8_2_feat_spe_present(void)
235{
236 return (((read_id_aa64dfr0_el1() >> ID_AA64DFR0_PMS_SHIFT) &
237 ID_AA64DFR0_PMS_MASK) != ID_AA64DFR0_SPE_NOT_SUPPORTED);
238}
239
240/*******************************************************************************
241 * Function to identify the presence of FEAT_SVE (Scalable Vector Extension)
242 ******************************************************************************/
243static inline bool is_armv8_2_feat_sve_present(void)
244{
245 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SVE_SHIFT) &
246 ID_AA64PFR0_SVE_MASK) == ID_AA64PFR0_SVE_SUPPORTED);
247}
248
249/*******************************************************************************
250 * Function to identify the presence of FEAT_RAS (Reliability,Availability,
251 * and Serviceability Extension)
252 ******************************************************************************/
253static inline bool is_armv8_2_feat_ras_present(void)
254{
255 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_RAS_SHIFT) &
256 ID_AA64PFR0_RAS_MASK) != ID_AA64PFR0_RAS_NOT_SUPPORTED);
257}
258
259/**************************************************************************
260 * Function to identify the presence of FEAT_DIT (Data Independent Timing)
261 *************************************************************************/
262static inline bool is_armv8_4_feat_dit_present(void)
263{
264 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) &
265 ID_AA64PFR0_DIT_MASK) == ID_AA64PFR0_DIT_SUPPORTED);
266}
267
268/*************************************************************************
269 * Function to identify the presence of FEAT_TRF (TraceLift)
270 ************************************************************************/
271static inline bool is_arm8_4_feat_trf_present(void)
272{
273 return (((read_id_aa64dfr0_el1() >> ID_AA64DFR0_TRACEFILT_SHIFT) &
274 ID_AA64DFR0_TRACEFILT_MASK) == ID_AA64DFR0_TRACEFILT_SUPPORTED);
275}
276
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000277/********************************************************************************
278 * Function to identify the presence of FEAT_NV2 (Enhanced Nested Virtualization
279 * Support)
280 *******************************************************************************/
281static inline unsigned int get_armv8_4_feat_nv_support(void)
282{
283 return (((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_NV_SHIFT) &
284 ID_AA64MMFR2_EL1_NV_MASK));
285}
286
Jayanth Dodderi Chidanand69316752022-05-09 12:33:03 +0100287/*******************************************************************************
288 * Function to identify the presence of FEAT_BRBE (Branch Record Buffer
289 * Extension)
290 ******************************************************************************/
291static inline bool is_feat_brbe_present(void)
292{
293 return (((read_id_aa64dfr0_el1() >> ID_AA64DFR0_BRBE_SHIFT) &
294 ID_AA64DFR0_BRBE_MASK) == ID_AA64DFR0_BRBE_SUPPORTED);
295}
296
Jayanth Dodderi Chidananda793ccc2022-05-19 14:08:28 +0100297/*******************************************************************************
298 * Function to identify the presence of FEAT_TRBE (Trace Buffer Extension)
299 ******************************************************************************/
300static inline bool is_feat_trbe_present(void)
301{
302 return (((read_id_aa64dfr0_el1() >> ID_AA64DFR0_TRACEBUFFER_SHIFT) &
303 ID_AA64DFR0_TRACEBUFFER_MASK) == ID_AA64DFR0_TRACEBUFFER_SUPPORTED);
304}
Jayanth Dodderi Chidanand69316752022-05-09 12:33:03 +0100305
Antonio Nino Diazc326c342019-01-11 11:20:10 +0000306#endif /* ARCH_FEATURES_H */