blob: c33d25e82481ae12ae9783ceef1f1567a7e70b0f [file] [log] [blame]
Jacky Baif7dc4012019-03-06 16:58:18 +08001/*
2 * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef IMX8M_PSCI_H
8#define IMX8M_PSCI_H
9
10#define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0])
11#define CLUSTER_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL1])
12#define SYSTEM_PWR_STATE(state) ((state)->pwr_domain_state[PLAT_MAX_PWR_LVL])
13
14int imx_pwr_domain_on(u_register_t mpidr);
15void imx_pwr_domain_on_finish(const psci_power_state_t *target_state);
16void imx_pwr_domain_off(const psci_power_state_t *target_state);
17int imx_validate_ns_entrypoint(uintptr_t ns_entrypoint);
Jacky Baif7dc4012019-03-06 16:58:18 +080018void imx_cpu_standby(plat_local_state_t cpu_state);
19void imx_domain_suspend(const psci_power_state_t *target_state);
20void imx_domain_suspend_finish(const psci_power_state_t *target_state);
Jacky Baif7dc4012019-03-06 16:58:18 +080021void __dead2 imx_pwr_domain_pwr_down_wfi(const psci_power_state_t *target_state);
22
23#endif /* IMX8M_PSCI_H */