Bryan O'Donoghue | dd6d5f2 | 2018-06-08 13:16:29 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | #include <imx_regs.h> |
| 7 | #include <imx_clock.h> |
| 8 | |
| 9 | static void imx7_clock_uart_init(void) |
| 10 | { |
| 11 | unsigned int i; |
| 12 | |
| 13 | for (i = 0; i < MXC_MAX_UART_NUM; i++) |
| 14 | imx_clock_disable_uart(i); |
| 15 | } |
| 16 | |
| 17 | void imx_clock_init(void) |
| 18 | { |
| 19 | /* |
| 20 | * The BootROM hands off to the next stage with the internal 24 MHz XTAL |
| 21 | * crystal already clocking the main PLL, which is very handy. |
| 22 | * Here we should enable whichever peripherals are required for ATF and |
| 23 | * OPTEE. |
| 24 | * |
| 25 | * Subsequent stages in the boot process such as u-boot and Linux |
| 26 | * already have a significant and mature code-base around clocks, so our |
| 27 | * objective should be to enable what we need for ATF/OPTEE without |
| 28 | * breaking any existing upstream code in Linux and u-boot. |
| 29 | */ |
| 30 | |
| 31 | /* Initialize UART clocks */ |
| 32 | imx7_clock_uart_init(); |
| 33 | } |