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developer65014b82015-04-13 14:47:57 +08001/*
2 * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30#include <arch.h>
31#include <asm_macros.S>
32#include <mt8173_def.h>
33
34 .globl plat_secondary_cold_boot_setup
35 .globl plat_report_exception
36 .globl platform_is_primary_cpu
Koan-Sin Tanbc998072017-01-19 16:43:49 +080037 .globl plat_my_core_pos
developer65014b82015-04-13 14:47:57 +080038 .globl plat_crash_console_init
39 .globl plat_crash_console_putc
40
41 /* -----------------------------------------------------
42 * void plat_secondary_cold_boot_setup (void);
43 *
44 * This function performs any platform specific actions
45 * needed for a secondary cpu after a cold reset e.g
46 * mark the cpu's presence, mechanism to place it in a
47 * holding pen etc.
48 * -----------------------------------------------------
49 */
50func plat_secondary_cold_boot_setup
51 /* MT8173 Oak does not do cold boot for secondary CPU */
52cb_panic:
53 b cb_panic
54endfunc plat_secondary_cold_boot_setup
55
56func platform_is_primary_cpu
57 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
58 cmp x0, #MT8173_PRIMARY_CPU
59 cset x0, eq
60 ret
61endfunc platform_is_primary_cpu
62
Koan-Sin Tanbc998072017-01-19 16:43:49 +080063#if !ENABLE_PLAT_COMPAT
64 /* -----------------------------------------------------
65 * unsigned int plat_my_core_pos(void);
66 *
67 * result: CorePos = CoreId + (ClusterId << 2)
68 * -----------------------------------------------------
69 */
70func plat_my_core_pos
71 mrs x0, mpidr_el1
72 and x1, x0, #MPIDR_CPU_MASK
73 and x0, x0, #MPIDR_CLUSTER_MASK
74 add x0, x1, x0, LSR #6
75 ret
76endfunc plat_my_core_pos
77#endif
78
developer65014b82015-04-13 14:47:57 +080079 /* ---------------------------------------------
80 * int plat_crash_console_init(void)
81 * Function to initialize the crash console
82 * without a C Runtime to print crash report.
Juan Castilloe7ae6db2015-11-26 14:52:15 +000083 * Clobber list : x0 - x4
developer65014b82015-04-13 14:47:57 +080084 * ---------------------------------------------
85 */
86func plat_crash_console_init
87 mov_imm x0, MT8173_UART0_BASE
88 mov_imm x1, MT8173_UART_CLOCK
89 mov_imm x2, MT8173_BAUDRATE
90 b console_core_init
91endfunc plat_crash_console_init
92
93 /* ---------------------------------------------
94 * int plat_crash_console_putc(void)
95 * Function to print a character on the crash
96 * console without a C Runtime.
97 * Clobber list : x1, x2
98 * ---------------------------------------------
99 */
100func plat_crash_console_putc
101 mov_imm x1, MT8173_UART0_BASE
102 b console_core_putc
103endfunc plat_crash_console_putc