Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 1 | /* |
Samuel Holland | ad0dae7 | 2022-01-23 17:12:26 -0600 | [diff] [blame] | 2 | * Copyright (c) 2016-2022, ARM Limited and Contributors. All rights reserved. |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * Contains generic routines to fix up the device tree blob passed on to |
| 9 | * payloads like BL32 and BL33 (and further down the boot chain). |
| 10 | * This allows to easily add PSCI nodes, when the original DT does not have |
| 11 | * it or advertises another method. |
Andre Przywara | 83fc839 | 2019-07-15 09:00:23 +0100 | [diff] [blame] | 12 | * Also it supports to add reserved memory nodes to describe memory that |
| 13 | * is used by the secure world, so that non-secure software avoids using |
| 14 | * that. |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 15 | */ |
| 16 | |
Javier Almansa Sobrino | 40f4984 | 2020-08-25 16:16:29 +0100 | [diff] [blame] | 17 | #include <errno.h> |
| 18 | #include <stdio.h> |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 19 | #include <string.h> |
| 20 | |
| 21 | #include <libfdt.h> |
| 22 | |
Javier Almansa Sobrino | 40f4984 | 2020-08-25 16:16:29 +0100 | [diff] [blame] | 23 | #include <arch.h> |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 24 | #include <common/debug.h> |
Javier Almansa Sobrino | 40f4984 | 2020-08-25 16:16:29 +0100 | [diff] [blame] | 25 | #include <common/fdt_fixup.h> |
| 26 | #include <common/fdt_wrappers.h> |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 27 | #include <drivers/console.h> |
| 28 | #include <lib/psci/psci.h> |
Javier Almansa Sobrino | 40f4984 | 2020-08-25 16:16:29 +0100 | [diff] [blame] | 29 | #include <plat/common/platform.h> |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 30 | |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 31 | |
| 32 | static int append_psci_compatible(void *fdt, int offs, const char *str) |
| 33 | { |
| 34 | return fdt_appendprop(fdt, offs, "compatible", str, strlen(str) + 1); |
| 35 | } |
| 36 | |
Andre Przywara | 6885560 | 2019-09-19 10:55:25 +0100 | [diff] [blame] | 37 | /* |
| 38 | * Those defines are for PSCI v0.1 legacy clients, which we expect to use |
| 39 | * the same execution state (AArch32/AArch64) as TF-A. |
| 40 | * Kernels running in AArch32 on an AArch64 TF-A should use PSCI v0.2. |
| 41 | */ |
| 42 | #ifdef __aarch64__ |
| 43 | #define PSCI_CPU_SUSPEND_FNID PSCI_CPU_SUSPEND_AARCH64 |
| 44 | #define PSCI_CPU_ON_FNID PSCI_CPU_ON_AARCH64 |
| 45 | #else |
| 46 | #define PSCI_CPU_SUSPEND_FNID PSCI_CPU_SUSPEND_AARCH32 |
| 47 | #define PSCI_CPU_ON_FNID PSCI_CPU_ON_AARCH32 |
| 48 | #endif |
| 49 | |
Andre Przywara | 16e6419 | 2019-09-19 10:45:28 +0100 | [diff] [blame] | 50 | /******************************************************************************* |
| 51 | * dt_add_psci_node() - Add a PSCI node into an existing device tree |
| 52 | * @fdt: pointer to the device tree blob in memory |
| 53 | * |
| 54 | * Add a device tree node describing PSCI into the root level of an existing |
| 55 | * device tree blob in memory. |
| 56 | * This will add v0.1, v0.2 and v1.0 compatible strings and the standard |
| 57 | * function IDs for v0.1 compatibility. |
| 58 | * An existing PSCI node will not be touched, the function will return success |
| 59 | * in this case. This function will not touch the /cpus enable methods, use |
| 60 | * dt_add_psci_cpu_enable_methods() for that. |
| 61 | * |
| 62 | * Return: 0 on success, -1 otherwise. |
| 63 | ******************************************************************************/ |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 64 | int dt_add_psci_node(void *fdt) |
| 65 | { |
| 66 | int offs; |
| 67 | |
| 68 | if (fdt_path_offset(fdt, "/psci") >= 0) { |
| 69 | WARN("PSCI Device Tree node already exists!\n"); |
| 70 | return 0; |
| 71 | } |
| 72 | |
| 73 | offs = fdt_path_offset(fdt, "/"); |
| 74 | if (offs < 0) |
| 75 | return -1; |
| 76 | offs = fdt_add_subnode(fdt, offs, "psci"); |
| 77 | if (offs < 0) |
| 78 | return -1; |
| 79 | if (append_psci_compatible(fdt, offs, "arm,psci-1.0")) |
| 80 | return -1; |
| 81 | if (append_psci_compatible(fdt, offs, "arm,psci-0.2")) |
| 82 | return -1; |
| 83 | if (append_psci_compatible(fdt, offs, "arm,psci")) |
| 84 | return -1; |
| 85 | if (fdt_setprop_string(fdt, offs, "method", "smc")) |
| 86 | return -1; |
Andre Przywara | 6885560 | 2019-09-19 10:55:25 +0100 | [diff] [blame] | 87 | if (fdt_setprop_u32(fdt, offs, "cpu_suspend", PSCI_CPU_SUSPEND_FNID)) |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 88 | return -1; |
| 89 | if (fdt_setprop_u32(fdt, offs, "cpu_off", PSCI_CPU_OFF)) |
| 90 | return -1; |
Andre Przywara | 6885560 | 2019-09-19 10:55:25 +0100 | [diff] [blame] | 91 | if (fdt_setprop_u32(fdt, offs, "cpu_on", PSCI_CPU_ON_FNID)) |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 92 | return -1; |
| 93 | return 0; |
| 94 | } |
| 95 | |
| 96 | /* |
| 97 | * Find the first subnode that has a "device_type" property with the value |
| 98 | * "cpu" and which's enable-method is not "psci" (yet). |
| 99 | * Returns 0 if no such subnode is found, so all have already been patched |
| 100 | * or none have to be patched in the first place. |
| 101 | * Returns 1 if *one* such subnode has been found and successfully changed |
| 102 | * to "psci". |
Andre Przywara | b768a1b | 2019-09-16 16:50:57 +0100 | [diff] [blame] | 103 | * Returns negative values on error. |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 104 | * |
| 105 | * Call in a loop until it returns 0. Recalculate the node offset after |
| 106 | * it has returned 1. |
| 107 | */ |
| 108 | static int dt_update_one_cpu_node(void *fdt, int offset) |
| 109 | { |
| 110 | int offs; |
| 111 | |
| 112 | /* Iterate over all subnodes to find those with device_type = "cpu". */ |
| 113 | for (offs = fdt_first_subnode(fdt, offset); offs >= 0; |
| 114 | offs = fdt_next_subnode(fdt, offs)) { |
| 115 | const char *prop; |
| 116 | int len; |
Andre Przywara | b768a1b | 2019-09-16 16:50:57 +0100 | [diff] [blame] | 117 | int ret; |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 118 | |
| 119 | prop = fdt_getprop(fdt, offs, "device_type", &len); |
Andre Przywara | b768a1b | 2019-09-16 16:50:57 +0100 | [diff] [blame] | 120 | if (prop == NULL) |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 121 | continue; |
Andre Przywara | b768a1b | 2019-09-16 16:50:57 +0100 | [diff] [blame] | 122 | if ((strcmp(prop, "cpu") != 0) || (len != 4)) |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 123 | continue; |
| 124 | |
| 125 | /* Ignore any nodes which already use "psci". */ |
| 126 | prop = fdt_getprop(fdt, offs, "enable-method", &len); |
Andre Przywara | b768a1b | 2019-09-16 16:50:57 +0100 | [diff] [blame] | 127 | if ((prop != NULL) && |
| 128 | (strcmp(prop, "psci") == 0) && (len == 5)) |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 129 | continue; |
| 130 | |
Andre Przywara | b768a1b | 2019-09-16 16:50:57 +0100 | [diff] [blame] | 131 | ret = fdt_setprop_string(fdt, offs, "enable-method", "psci"); |
| 132 | if (ret < 0) |
| 133 | return ret; |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 134 | /* |
| 135 | * Subnode found and patched. |
| 136 | * Restart to accommodate potentially changed offsets. |
| 137 | */ |
| 138 | return 1; |
| 139 | } |
| 140 | |
| 141 | if (offs == -FDT_ERR_NOTFOUND) |
| 142 | return 0; |
| 143 | |
| 144 | return offs; |
| 145 | } |
| 146 | |
Andre Przywara | 16e6419 | 2019-09-19 10:45:28 +0100 | [diff] [blame] | 147 | /******************************************************************************* |
| 148 | * dt_add_psci_cpu_enable_methods() - switch CPU nodes in DT to use PSCI |
| 149 | * @fdt: pointer to the device tree blob in memory |
| 150 | * |
| 151 | * Iterate over all CPU device tree nodes (/cpus/cpu@x) in memory to change |
| 152 | * the enable-method to PSCI. This will add the enable-method properties, if |
| 153 | * required, or will change existing properties to read "psci". |
| 154 | * |
| 155 | * Return: 0 on success, or a negative error value otherwise. |
| 156 | ******************************************************************************/ |
| 157 | |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 158 | int dt_add_psci_cpu_enable_methods(void *fdt) |
| 159 | { |
| 160 | int offs, ret; |
| 161 | |
| 162 | do { |
| 163 | offs = fdt_path_offset(fdt, "/cpus"); |
| 164 | if (offs < 0) |
| 165 | return offs; |
| 166 | |
| 167 | ret = dt_update_one_cpu_node(fdt, offs); |
| 168 | } while (ret > 0); |
| 169 | |
| 170 | return ret; |
| 171 | } |
Andre Przywara | 83fc839 | 2019-07-15 09:00:23 +0100 | [diff] [blame] | 172 | |
| 173 | #define HIGH_BITS(x) ((sizeof(x) > 4) ? ((x) >> 32) : (typeof(x))0) |
| 174 | |
Andre Przywara | 16e6419 | 2019-09-19 10:45:28 +0100 | [diff] [blame] | 175 | /******************************************************************************* |
| 176 | * fdt_add_reserved_memory() - reserve (secure) memory regions in DT |
| 177 | * @dtb: pointer to the device tree blob in memory |
| 178 | * @node_name: name of the subnode to be used |
| 179 | * @base: physical base address of the reserved region |
| 180 | * @size: size of the reserved region |
| 181 | * |
| 182 | * Add a region of memory to the /reserved-memory node in a device tree in |
| 183 | * memory, creating that node if required. Each region goes into a subnode |
| 184 | * of that node and has a @node_name, a @base address and a @size. |
| 185 | * This will prevent any device tree consumer from using that memory. It |
| 186 | * can be used to announce secure memory regions, as it adds the "no-map" |
| 187 | * property to prevent mapping and speculative operations on that region. |
| 188 | * |
| 189 | * See reserved-memory/reserved-memory.txt in the (Linux kernel) DT binding |
| 190 | * documentation for details. |
Andre Przywara | 3776ff0 | 2021-01-17 02:11:32 +0000 | [diff] [blame] | 191 | * According to this binding, the address-cells and size-cells must match |
| 192 | * those of the root node. |
Andre Przywara | 16e6419 | 2019-09-19 10:45:28 +0100 | [diff] [blame] | 193 | * |
| 194 | * Return: 0 on success, a negative error value otherwise. |
| 195 | ******************************************************************************/ |
Andre Przywara | 83fc839 | 2019-07-15 09:00:23 +0100 | [diff] [blame] | 196 | int fdt_add_reserved_memory(void *dtb, const char *node_name, |
| 197 | uintptr_t base, size_t size) |
| 198 | { |
| 199 | int offs = fdt_path_offset(dtb, "/reserved-memory"); |
Andre Przywara | 3776ff0 | 2021-01-17 02:11:32 +0000 | [diff] [blame] | 200 | uint32_t addresses[4]; |
| 201 | int ac, sc; |
| 202 | unsigned int idx = 0; |
Andre Przywara | 83fc839 | 2019-07-15 09:00:23 +0100 | [diff] [blame] | 203 | |
Andre Przywara | 3776ff0 | 2021-01-17 02:11:32 +0000 | [diff] [blame] | 204 | ac = fdt_address_cells(dtb, 0); |
| 205 | sc = fdt_size_cells(dtb, 0); |
Andre Przywara | 83fc839 | 2019-07-15 09:00:23 +0100 | [diff] [blame] | 206 | if (offs < 0) { /* create if not existing yet */ |
| 207 | offs = fdt_add_subnode(dtb, 0, "reserved-memory"); |
Andre Przywara | 3776ff0 | 2021-01-17 02:11:32 +0000 | [diff] [blame] | 208 | if (offs < 0) { |
Andre Przywara | 83fc839 | 2019-07-15 09:00:23 +0100 | [diff] [blame] | 209 | return offs; |
Andre Przywara | 3776ff0 | 2021-01-17 02:11:32 +0000 | [diff] [blame] | 210 | } |
| 211 | fdt_setprop_u32(dtb, offs, "#address-cells", ac); |
| 212 | fdt_setprop_u32(dtb, offs, "#size-cells", sc); |
Andre Przywara | 83fc839 | 2019-07-15 09:00:23 +0100 | [diff] [blame] | 213 | fdt_setprop(dtb, offs, "ranges", NULL, 0); |
| 214 | } |
| 215 | |
Andre Przywara | 3776ff0 | 2021-01-17 02:11:32 +0000 | [diff] [blame] | 216 | if (ac > 1) { |
| 217 | addresses[idx] = cpu_to_fdt32(HIGH_BITS(base)); |
| 218 | idx++; |
| 219 | } |
| 220 | addresses[idx] = cpu_to_fdt32(base & 0xffffffff); |
| 221 | idx++; |
| 222 | if (sc > 1) { |
| 223 | addresses[idx] = cpu_to_fdt32(HIGH_BITS(size)); |
| 224 | idx++; |
| 225 | } |
| 226 | addresses[idx] = cpu_to_fdt32(size & 0xffffffff); |
| 227 | idx++; |
Andre Przywara | 83fc839 | 2019-07-15 09:00:23 +0100 | [diff] [blame] | 228 | offs = fdt_add_subnode(dtb, offs, node_name); |
| 229 | fdt_setprop(dtb, offs, "no-map", NULL, 0); |
Andre Przywara | 3776ff0 | 2021-01-17 02:11:32 +0000 | [diff] [blame] | 230 | fdt_setprop(dtb, offs, "reg", addresses, idx * sizeof(uint32_t)); |
Andre Przywara | 83fc839 | 2019-07-15 09:00:23 +0100 | [diff] [blame] | 231 | |
| 232 | return 0; |
| 233 | } |
Javier Almansa Sobrino | 40f4984 | 2020-08-25 16:16:29 +0100 | [diff] [blame] | 234 | |
| 235 | /******************************************************************************* |
| 236 | * fdt_add_cpu() Add a new CPU node to the DT |
| 237 | * @dtb: Pointer to the device tree blob in memory |
| 238 | * @parent: Offset of the parent node |
| 239 | * @mpidr: MPIDR for the current CPU |
| 240 | * |
| 241 | * Create and add a new cpu node to a DTB. |
| 242 | * |
| 243 | * Return the offset of the new node or a negative value in case of error |
| 244 | ******************************************************************************/ |
| 245 | |
| 246 | static int fdt_add_cpu(void *dtb, int parent, u_register_t mpidr) |
| 247 | { |
| 248 | int cpu_offs; |
| 249 | int err; |
| 250 | char snode_name[15]; |
| 251 | uint64_t reg_prop; |
| 252 | |
| 253 | reg_prop = mpidr & MPID_MASK & ~MPIDR_MT_MASK; |
| 254 | |
| 255 | snprintf(snode_name, sizeof(snode_name), "cpu@%x", |
| 256 | (unsigned int)reg_prop); |
| 257 | |
| 258 | cpu_offs = fdt_add_subnode(dtb, parent, snode_name); |
| 259 | if (cpu_offs < 0) { |
| 260 | ERROR ("FDT: add subnode \"%s\" failed: %i\n", |
| 261 | snode_name, cpu_offs); |
| 262 | return cpu_offs; |
| 263 | } |
| 264 | |
| 265 | err = fdt_setprop_string(dtb, cpu_offs, "compatible", "arm,armv8"); |
| 266 | if (err < 0) { |
| 267 | ERROR ("FDT: write to \"%s\" property of node at offset %i failed\n", |
| 268 | "compatible", cpu_offs); |
| 269 | return err; |
| 270 | } |
| 271 | |
| 272 | err = fdt_setprop_u64(dtb, cpu_offs, "reg", reg_prop); |
| 273 | if (err < 0) { |
| 274 | ERROR ("FDT: write to \"%s\" property of node at offset %i failed\n", |
| 275 | "reg", cpu_offs); |
| 276 | return err; |
| 277 | } |
| 278 | |
| 279 | err = fdt_setprop_string(dtb, cpu_offs, "device_type", "cpu"); |
| 280 | if (err < 0) { |
| 281 | ERROR ("FDT: write to \"%s\" property of node at offset %i failed\n", |
| 282 | "device_type", cpu_offs); |
| 283 | return err; |
| 284 | } |
| 285 | |
| 286 | err = fdt_setprop_string(dtb, cpu_offs, "enable-method", "psci"); |
| 287 | if (err < 0) { |
| 288 | ERROR ("FDT: write to \"%s\" property of node at offset %i failed\n", |
| 289 | "enable-method", cpu_offs); |
| 290 | return err; |
| 291 | } |
| 292 | |
| 293 | return cpu_offs; |
| 294 | } |
| 295 | |
| 296 | /****************************************************************************** |
| 297 | * fdt_add_cpus_node() - Add the cpus node to the DTB |
| 298 | * @dtb: pointer to the device tree blob in memory |
| 299 | * @afflv0: Maximum number of threads per core (affinity level 0). |
| 300 | * @afflv1: Maximum number of CPUs per cluster (affinity level 1). |
| 301 | * @afflv2: Maximum number of clusters (affinity level 2). |
| 302 | * |
| 303 | * Iterate over all the possible MPIDs given the maximum affinity levels and |
| 304 | * add a cpus node to the DTB with all the valid CPUs on the system. |
| 305 | * If there is already a /cpus node, exit gracefully |
| 306 | * |
| 307 | * A system with two CPUs would generate a node equivalent or similar to: |
| 308 | * |
| 309 | * cpus { |
| 310 | * #address-cells = <2>; |
| 311 | * #size-cells = <0>; |
| 312 | * |
| 313 | * cpu0: cpu@0 { |
| 314 | * compatible = "arm,armv8"; |
| 315 | * reg = <0x0 0x0>; |
| 316 | * device_type = "cpu"; |
| 317 | * enable-method = "psci"; |
| 318 | * }; |
| 319 | * cpu1: cpu@10000 { |
| 320 | * compatible = "arm,armv8"; |
| 321 | * reg = <0x0 0x100>; |
| 322 | * device_type = "cpu"; |
| 323 | * enable-method = "psci"; |
| 324 | * }; |
| 325 | * }; |
| 326 | * |
| 327 | * Full documentation about the CPU bindings can be found at: |
| 328 | * https://www.kernel.org/doc/Documentation/devicetree/bindings/arm/cpus.txt |
| 329 | * |
| 330 | * Return the offset of the node or a negative value on error. |
| 331 | ******************************************************************************/ |
| 332 | |
| 333 | int fdt_add_cpus_node(void *dtb, unsigned int afflv0, |
| 334 | unsigned int afflv1, unsigned int afflv2) |
| 335 | { |
| 336 | int offs; |
| 337 | int err; |
| 338 | unsigned int i, j, k; |
| 339 | u_register_t mpidr; |
| 340 | int cpuid; |
| 341 | |
| 342 | if (fdt_path_offset(dtb, "/cpus") >= 0) { |
| 343 | return -EEXIST; |
| 344 | } |
| 345 | |
| 346 | offs = fdt_add_subnode(dtb, 0, "cpus"); |
| 347 | if (offs < 0) { |
| 348 | ERROR ("FDT: add subnode \"cpus\" node to parent node failed"); |
| 349 | return offs; |
| 350 | } |
| 351 | |
| 352 | err = fdt_setprop_u32(dtb, offs, "#address-cells", 2); |
| 353 | if (err < 0) { |
| 354 | ERROR ("FDT: write to \"%s\" property of node at offset %i failed\n", |
| 355 | "#address-cells", offs); |
| 356 | return err; |
| 357 | } |
| 358 | |
| 359 | err = fdt_setprop_u32(dtb, offs, "#size-cells", 0); |
| 360 | if (err < 0) { |
| 361 | ERROR ("FDT: write to \"%s\" property of node at offset %i failed\n", |
| 362 | "#size-cells", offs); |
| 363 | return err; |
| 364 | } |
| 365 | |
| 366 | /* |
| 367 | * Populate the node with the CPUs. |
| 368 | * As libfdt prepends subnodes within a node, reverse the index count |
| 369 | * so the CPU nodes would be better ordered. |
| 370 | */ |
| 371 | for (i = afflv2; i > 0U; i--) { |
| 372 | for (j = afflv1; j > 0U; j--) { |
| 373 | for (k = afflv0; k > 0U; k--) { |
| 374 | mpidr = ((i - 1) << MPIDR_AFF2_SHIFT) | |
| 375 | ((j - 1) << MPIDR_AFF1_SHIFT) | |
| 376 | ((k - 1) << MPIDR_AFF0_SHIFT) | |
| 377 | (read_mpidr_el1() & MPIDR_MT_MASK); |
| 378 | |
| 379 | cpuid = plat_core_pos_by_mpidr(mpidr); |
| 380 | if (cpuid >= 0) { |
| 381 | /* Valid MPID found */ |
| 382 | err = fdt_add_cpu(dtb, offs, mpidr); |
| 383 | if (err < 0) { |
| 384 | ERROR ("FDT: %s 0x%08x\n", |
| 385 | "error adding CPU", |
| 386 | (uint32_t)mpidr); |
| 387 | return err; |
| 388 | } |
| 389 | } |
| 390 | } |
| 391 | } |
| 392 | } |
| 393 | |
| 394 | return offs; |
| 395 | } |
Andre Przywara | 64b9e14 | 2020-08-24 18:28:44 +0100 | [diff] [blame] | 396 | |
Samuel Holland | ad0dae7 | 2022-01-23 17:12:26 -0600 | [diff] [blame] | 397 | /******************************************************************************* |
| 398 | * fdt_add_cpu_idle_states() - add PSCI CPU idle states to cpu nodes in the DT |
| 399 | * @dtb: pointer to the device tree blob in memory |
| 400 | * @states: array of idle state descriptions, ending with empty element |
| 401 | * |
| 402 | * Add information about CPU idle states to the devicetree. This function |
| 403 | * assumes that CPU idle states are not already present in the devicetree, and |
| 404 | * that all CPU states are equally applicable to all CPUs. |
| 405 | * |
| 406 | * See arm/idle-states.yaml and arm/psci.yaml in the (Linux kernel) DT binding |
| 407 | * documentation for more details. |
| 408 | * |
| 409 | * Return: 0 on success, a negative error value otherwise. |
| 410 | ******************************************************************************/ |
| 411 | int fdt_add_cpu_idle_states(void *dtb, const struct psci_cpu_idle_state *state) |
| 412 | { |
| 413 | int cpu_node, cpus_node, idle_states_node, ret; |
| 414 | uint32_t count, phandle; |
| 415 | |
| 416 | ret = fdt_find_max_phandle(dtb, &phandle); |
| 417 | phandle++; |
| 418 | if (ret < 0) { |
| 419 | return ret; |
| 420 | } |
| 421 | |
| 422 | cpus_node = fdt_path_offset(dtb, "/cpus"); |
| 423 | if (cpus_node < 0) { |
| 424 | return cpus_node; |
| 425 | } |
| 426 | |
| 427 | /* Create the idle-states node and its child nodes. */ |
| 428 | idle_states_node = fdt_add_subnode(dtb, cpus_node, "idle-states"); |
| 429 | if (idle_states_node < 0) { |
| 430 | return idle_states_node; |
| 431 | } |
| 432 | |
| 433 | ret = fdt_setprop_string(dtb, idle_states_node, "entry-method", "psci"); |
| 434 | if (ret < 0) { |
| 435 | return ret; |
| 436 | } |
| 437 | |
| 438 | for (count = 0U; state->name != NULL; count++, phandle++, state++) { |
| 439 | int idle_state_node; |
| 440 | |
| 441 | idle_state_node = fdt_add_subnode(dtb, idle_states_node, |
| 442 | state->name); |
| 443 | if (idle_state_node < 0) { |
| 444 | return idle_state_node; |
| 445 | } |
| 446 | |
| 447 | fdt_setprop_string(dtb, idle_state_node, "compatible", |
| 448 | "arm,idle-state"); |
| 449 | fdt_setprop_u32(dtb, idle_state_node, "arm,psci-suspend-param", |
| 450 | state->power_state); |
| 451 | if (state->local_timer_stop) { |
| 452 | fdt_setprop_empty(dtb, idle_state_node, |
| 453 | "local-timer-stop"); |
| 454 | } |
| 455 | fdt_setprop_u32(dtb, idle_state_node, "entry-latency-us", |
| 456 | state->entry_latency_us); |
| 457 | fdt_setprop_u32(dtb, idle_state_node, "exit-latency-us", |
| 458 | state->exit_latency_us); |
| 459 | fdt_setprop_u32(dtb, idle_state_node, "min-residency-us", |
| 460 | state->min_residency_us); |
| 461 | if (state->wakeup_latency_us) { |
| 462 | fdt_setprop_u32(dtb, idle_state_node, |
| 463 | "wakeup-latency-us", |
| 464 | state->wakeup_latency_us); |
| 465 | } |
| 466 | fdt_setprop_u32(dtb, idle_state_node, "phandle", phandle); |
| 467 | } |
| 468 | |
| 469 | if (count == 0U) { |
| 470 | return 0; |
| 471 | } |
| 472 | |
| 473 | /* Link each cpu node to the idle state nodes. */ |
| 474 | fdt_for_each_subnode(cpu_node, dtb, cpus_node) { |
| 475 | const char *device_type; |
| 476 | fdt32_t *value; |
| 477 | |
| 478 | /* Only process child nodes with device_type = "cpu". */ |
| 479 | device_type = fdt_getprop(dtb, cpu_node, "device_type", NULL); |
| 480 | if (device_type == NULL || strcmp(device_type, "cpu") != 0) { |
| 481 | continue; |
| 482 | } |
| 483 | |
| 484 | /* Allocate space for the list of phandles. */ |
| 485 | ret = fdt_setprop_placeholder(dtb, cpu_node, "cpu-idle-states", |
| 486 | count * sizeof(phandle), |
| 487 | (void **)&value); |
| 488 | if (ret < 0) { |
| 489 | return ret; |
| 490 | } |
| 491 | |
| 492 | /* Fill in the phandles of the idle state nodes. */ |
| 493 | for (uint32_t i = 0U; i < count; ++i) { |
| 494 | value[i] = cpu_to_fdt32(phandle - count + i); |
| 495 | } |
| 496 | } |
| 497 | |
| 498 | return 0; |
| 499 | } |
| 500 | |
Andre Przywara | 64b9e14 | 2020-08-24 18:28:44 +0100 | [diff] [blame] | 501 | /** |
| 502 | * fdt_adjust_gic_redist() - Adjust GICv3 redistributor size |
| 503 | * @dtb: Pointer to the DT blob in memory |
| 504 | * @nr_cores: Number of CPU cores on this system. |
Andre Przywara | f2a78fe | 2021-05-19 09:37:21 +0100 | [diff] [blame] | 505 | * @gicr_base: Base address of the first GICR frame, or ~0 if unchanged |
Andre Przywara | 64b9e14 | 2020-08-24 18:28:44 +0100 | [diff] [blame] | 506 | * @gicr_frame_size: Size of the GICR frame per core |
| 507 | * |
| 508 | * On a GICv3 compatible interrupt controller, the redistributor provides |
| 509 | * a number of 64k pages per each supported core. So with a dynamic topology, |
| 510 | * this size cannot be known upfront and thus can't be hardcoded into the DTB. |
| 511 | * |
| 512 | * Find the DT node describing the GICv3 interrupt controller, and adjust |
| 513 | * the size of the redistributor to match the number of actual cores on |
| 514 | * this system. |
| 515 | * A GICv4 compatible redistributor uses four 64K pages per core, whereas GICs |
| 516 | * without support for direct injection of virtual interrupts use two 64K pages. |
| 517 | * The @gicr_frame_size parameter should be 262144 and 131072, respectively. |
Andre Przywara | f2a78fe | 2021-05-19 09:37:21 +0100 | [diff] [blame] | 518 | * Also optionally allow adjusting the GICR frame base address, when this is |
| 519 | * different due to ITS frames between distributor and redistributor. |
Andre Przywara | 64b9e14 | 2020-08-24 18:28:44 +0100 | [diff] [blame] | 520 | * |
| 521 | * Return: 0 on success, negative error value otherwise. |
| 522 | */ |
| 523 | int fdt_adjust_gic_redist(void *dtb, unsigned int nr_cores, |
Andre Przywara | f2a78fe | 2021-05-19 09:37:21 +0100 | [diff] [blame] | 524 | uintptr_t gicr_base, unsigned int gicr_frame_size) |
Andre Przywara | 64b9e14 | 2020-08-24 18:28:44 +0100 | [diff] [blame] | 525 | { |
| 526 | int offset = fdt_node_offset_by_compatible(dtb, 0, "arm,gic-v3"); |
Andre Przywara | f2a78fe | 2021-05-19 09:37:21 +0100 | [diff] [blame] | 527 | uint64_t reg_64; |
| 528 | uint32_t reg_32; |
Andre Przywara | 64b9e14 | 2020-08-24 18:28:44 +0100 | [diff] [blame] | 529 | void *val; |
Andre Przywara | f2a78fe | 2021-05-19 09:37:21 +0100 | [diff] [blame] | 530 | int parent, ret; |
Andre Przywara | 64b9e14 | 2020-08-24 18:28:44 +0100 | [diff] [blame] | 531 | int ac, sc; |
| 532 | |
| 533 | if (offset < 0) { |
| 534 | return offset; |
| 535 | } |
| 536 | |
| 537 | parent = fdt_parent_offset(dtb, offset); |
| 538 | if (parent < 0) { |
| 539 | return parent; |
| 540 | } |
| 541 | ac = fdt_address_cells(dtb, parent); |
| 542 | sc = fdt_size_cells(dtb, parent); |
| 543 | if (ac < 0 || sc < 0) { |
| 544 | return -EINVAL; |
| 545 | } |
| 546 | |
Andre Przywara | f2a78fe | 2021-05-19 09:37:21 +0100 | [diff] [blame] | 547 | if (gicr_base != INVALID_BASE_ADDR) { |
| 548 | if (ac == 1) { |
| 549 | reg_32 = cpu_to_fdt32(gicr_base); |
| 550 | val = ®_32; |
| 551 | } else { |
| 552 | reg_64 = cpu_to_fdt64(gicr_base); |
| 553 | val = ®_64; |
| 554 | } |
| 555 | /* |
| 556 | * The redistributor base address is the second address in |
| 557 | * the "reg" entry, so we have to skip one address and one |
| 558 | * size cell. |
| 559 | */ |
| 560 | ret = fdt_setprop_inplace_namelen_partial(dtb, offset, |
| 561 | "reg", 3, |
| 562 | (ac + sc) * 4, |
| 563 | val, ac * 4); |
| 564 | if (ret < 0) { |
| 565 | return ret; |
| 566 | } |
| 567 | } |
| 568 | |
Andre Przywara | 64b9e14 | 2020-08-24 18:28:44 +0100 | [diff] [blame] | 569 | if (sc == 1) { |
Andre Przywara | f2a78fe | 2021-05-19 09:37:21 +0100 | [diff] [blame] | 570 | reg_32 = cpu_to_fdt32(nr_cores * gicr_frame_size); |
| 571 | val = ®_32; |
Andre Przywara | 64b9e14 | 2020-08-24 18:28:44 +0100 | [diff] [blame] | 572 | } else { |
Andre Przywara | f2a78fe | 2021-05-19 09:37:21 +0100 | [diff] [blame] | 573 | reg_64 = cpu_to_fdt64(nr_cores * (uint64_t)gicr_frame_size); |
| 574 | val = ®_64; |
Andre Przywara | 64b9e14 | 2020-08-24 18:28:44 +0100 | [diff] [blame] | 575 | } |
| 576 | |
| 577 | /* |
| 578 | * The redistributor is described in the second "reg" entry. |
| 579 | * So we have to skip one address and one size cell, then another |
| 580 | * address cell to get to the second size cell. |
| 581 | */ |
| 582 | return fdt_setprop_inplace_namelen_partial(dtb, offset, "reg", 3, |
| 583 | (ac + sc + ac) * 4, |
| 584 | val, sc * 4); |
| 585 | } |
Andre Przywara | 3e8c7ec | 2021-12-19 13:55:33 +0000 | [diff] [blame] | 586 | /** |
| 587 | * fdt_set_mac_address () - store MAC address in device tree |
| 588 | * @dtb: pointer to the device tree blob in memory |
| 589 | * @eth_idx: number of Ethernet interface in /aliases node |
| 590 | * @mac_addr: pointer to 6 byte MAC address to store |
| 591 | * |
| 592 | * Use the generic local-mac-address property in a network device DT node |
| 593 | * to define the MAC address this device should be using. Many platform |
| 594 | * network devices lack device-specific non-volatile storage to hold this |
| 595 | * address, and leave it up to firmware to find and store a unique MAC |
| 596 | * address in the DT. |
| 597 | * The MAC address could be read from some board or firmware defined storage, |
| 598 | * or could be derived from some other unique property like a serial number. |
| 599 | * |
| 600 | * Return: 0 on success, a negative libfdt error value otherwise. |
| 601 | */ |
| 602 | int fdt_set_mac_address(void *dtb, unsigned int ethernet_idx, |
| 603 | const uint8_t *mac_addr) |
| 604 | { |
| 605 | char eth_alias[12]; |
| 606 | const char *path; |
| 607 | int node; |
| 608 | |
| 609 | if (ethernet_idx > 9U) { |
| 610 | return -FDT_ERR_BADVALUE; |
| 611 | } |
| 612 | snprintf(eth_alias, sizeof(eth_alias), "ethernet%d", ethernet_idx); |
| 613 | |
| 614 | path = fdt_get_alias(dtb, eth_alias); |
| 615 | if (path == NULL) { |
| 616 | return -FDT_ERR_NOTFOUND; |
| 617 | } |
| 618 | |
| 619 | node = fdt_path_offset(dtb, path); |
| 620 | if (node < 0) { |
| 621 | ERROR("Path \"%s\" not found in DT: %d\n", path, node); |
| 622 | return node; |
| 623 | } |
| 624 | |
| 625 | return fdt_setprop(dtb, node, "local-mac-address", mac_addr, 6); |
| 626 | } |