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Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +05301/*
Venkatesh Yadav Abbarapu17a12ce2020-11-27 08:42:14 -07002 * Copyright (c) 2018-2021, ARM Limited and Contributors. All rights reserved.
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +05303 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <assert.h>
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +05308#include <errno.h>
Tejas Patel54d13192019-02-27 18:44:55 +05309#include <plat_arm.h>
Tejas Patel69409962018-12-14 00:55:29 -080010#include <plat_private.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000011#include <bl31/bl31.h>
12#include <common/bl_common.h>
13#include <common/debug.h>
Venkatesh Yadav Abbarapu17a12ce2020-11-27 08:42:14 -070014#include <drivers/arm/dcc.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000015#include <drivers/arm/pl011.h>
16#include <drivers/console.h>
Venkatesh Yadav Abbarapu9156ffd2020-01-22 21:23:20 -070017#include <lib/mmio.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000018#include <lib/xlat_tables/xlat_tables.h>
19#include <plat/common/platform.h>
Venkatesh Yadav Abbarapu9156ffd2020-01-22 21:23:20 -070020#include <versal_def.h>
21#include <plat_private.h>
22#include <plat_startup.h>
Venkatesh Yadav Abbarapu58b24d82022-07-12 09:19:03 +053023#include <pm_ipi.h>
24#include "pm_client.h"
25#include "pm_api_sys.h"
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000026
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053027static entry_point_info_t bl32_image_ep_info;
28static entry_point_info_t bl33_image_ep_info;
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053029
30/*
31 * Return a pointer to the 'entry_point_info' structure of the next image for
32 * the security state specified. BL33 corresponds to the non-secure image type
33 * while BL32 corresponds to the secure image type. A NULL pointer is returned
34 * if the image does not exist.
35 */
36entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
37{
38 assert(sec_state_is_valid(type));
39
Venkatesh Yadav Abbarapu5f115db2021-01-10 20:40:16 -070040 if (type == NON_SECURE) {
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053041 return &bl33_image_ep_info;
Venkatesh Yadav Abbarapu5f115db2021-01-10 20:40:16 -070042 }
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053043
44 return &bl32_image_ep_info;
45}
46
47/*
Venkatesh Yadav Abbarapu9156ffd2020-01-22 21:23:20 -070048 * Set the build time defaults,if we can't find any config data.
49 */
50static inline void bl31_set_default_config(void)
51{
Abhyuday Godhasarac0c49e52021-08-24 07:39:41 -070052 bl32_image_ep_info.pc = (uintptr_t)BL32_BASE;
53 bl32_image_ep_info.spsr = (uint32_t)arm_get_spsr_for_bl32_entry();
54 bl33_image_ep_info.pc = (uintptr_t)plat_get_ns_image_entrypoint();
55 bl33_image_ep_info.spsr = (uint32_t)SPSR_64(MODE_EL2, MODE_SP_ELX,
56 DISABLE_ALL_EXCEPTIONS);
Venkatesh Yadav Abbarapu9156ffd2020-01-22 21:23:20 -070057}
58
59/*
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053060 * Perform any BL31 specific platform actions. Here is an opportunity to copy
61 * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they
62 * are lost (potentially). This needs to be done before the MMU is initialized
63 * so that the memory layout can be used while creating page tables.
64 */
65void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
66 u_register_t arg2, u_register_t arg3)
67{
Venkatesh Yadav Abbarapu9156ffd2020-01-22 21:23:20 -070068 uint64_t atf_handoff_addr;
Venkatesh Yadav Abbarapu58b24d82022-07-12 09:19:03 +053069 uint32_t payload[PAYLOAD_ARG_CNT], max_size = ATF_HANDOFF_PARAMS_MAX_SIZE;
70 enum pm_ret_status ret_status;
71 uint64_t addr[ATF_HANDOFF_PARAMS_MAX_SIZE];
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053072
Venkatesh Yadav Abbarapue91b4c22021-12-19 21:36:23 -070073 if (VERSAL_CONSOLE_IS(pl011) || (VERSAL_CONSOLE_IS(pl011_1))) {
Venkatesh Yadav Abbarapu17a12ce2020-11-27 08:42:14 -070074 static console_t versal_runtime_console;
75 /* Initialize the console to provide early debug support */
Venkatesh Yadav Abbarapubde87592022-05-24 11:11:12 +053076 int32_t rc = console_pl011_register((unsigned long)VERSAL_UART_BASE,
77 (uint32_t)VERSAL_UART_CLOCK,
78 (uint32_t)VERSAL_UART_BAUDRATE,
Venkatesh Yadav Abbarapu17a12ce2020-11-27 08:42:14 -070079 &versal_runtime_console);
80 if (rc == 0) {
81 panic();
82 }
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053083
Venkatesh Yadav Abbarapubde87592022-05-24 11:11:12 +053084 console_set_scope(&versal_runtime_console, (uint32_t)(CONSOLE_FLAG_BOOT |
Abhyuday Godhasara096f5cc2021-08-13 06:45:32 -070085 CONSOLE_FLAG_RUNTIME));
Venkatesh Yadav Abbarapu17a12ce2020-11-27 08:42:14 -070086 } else if (VERSAL_CONSOLE_IS(dcc)) {
87 /* Initialize the dcc console for debug */
Venkatesh Yadav Abbarapubde87592022-05-24 11:11:12 +053088 int32_t rc = console_dcc_register();
Venkatesh Yadav Abbarapu17a12ce2020-11-27 08:42:14 -070089 if (rc == 0) {
90 panic();
91 }
Abhyuday Godhasara4c1a7052021-08-11 02:52:35 -070092 } else {
93 NOTICE("BL31: Did not register for any console.\n");
Venkatesh Yadav Abbarapu17a12ce2020-11-27 08:42:14 -070094 }
Abhyuday Godhasara4c1a7052021-08-11 02:52:35 -070095
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053096 /* Initialize the platform config for future decision making */
97 versal_config_setup();
98 /* There are no parameters from BL2 if BL31 is a reset vector */
99 assert(arg0 == 0U);
100 assert(arg1 == 0U);
101
102 /*
103 * Do initial security configuration to allow DRAM/device access. On
104 * Base VERSAL only DRAM security is programmable (via TrustZone), but
105 * other platforms might have more programmable security devices
106 * present.
107 */
108
109 /* Populate common information for BL32 and BL33 */
110 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0);
111 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
112 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0);
113 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
114
Venkatesh Yadav Abbarapu58b24d82022-07-12 09:19:03 +0530115 PM_PACK_PAYLOAD4(payload, LOADER_MODULE_ID, 1, PM_LOAD_GET_HANDOFF_PARAMS,
116 (uintptr_t)addr >> 32U, (uintptr_t)addr, max_size);
117 ret_status = pm_ipi_send_sync(primary_proc, payload, NULL, 0);
118 if (ret_status == PM_RET_SUCCESS) {
119 INFO("BL31: GET_HANDOFF_PARAMS call success=%d\n", ret_status);
120 atf_handoff_addr = (uintptr_t)&addr;
121 } else {
122 ERROR("BL31: GET_HANDOFF_PARAMS Failed, read atf_handoff_addr from reg\n");
123 atf_handoff_addr = mmio_read_32(PMC_GLOBAL_GLOB_GEN_STORAGE4);
124 }
125
Venkatesh Yadav Abbarapu9156ffd2020-01-22 21:23:20 -0700126 enum fsbl_handoff ret = fsbl_atf_handover(&bl32_image_ep_info,
127 &bl33_image_ep_info,
128 atf_handoff_addr);
Venkatesh Yadav Abbarapuef75de02020-11-23 03:29:51 -0800129 if (ret == FSBL_HANDOFF_NO_STRUCT || ret == FSBL_HANDOFF_INVAL_STRUCT) {
Venkatesh Yadav Abbarapu9156ffd2020-01-22 21:23:20 -0700130 bl31_set_default_config();
Venkatesh Yadav Abbarapu39fdc0a2022-03-03 01:58:36 -0700131 } else if (ret == FSBL_HANDOFF_TOO_MANY_PARTS) {
132 ERROR("BL31: Error too many partitions %u\n", ret);
Venkatesh Yadav Abbarapu9156ffd2020-01-22 21:23:20 -0700133 } else if (ret != FSBL_HANDOFF_SUCCESS) {
134 panic();
Abhyuday Godhasara4c1a7052021-08-11 02:52:35 -0700135 } else {
Venkatesh Yadav Abbarapu39fdc0a2022-03-03 01:58:36 -0700136 INFO("BL31: fsbl-atf handover success %u\n", ret);
Venkatesh Yadav Abbarapu9156ffd2020-01-22 21:23:20 -0700137 }
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530138
139 NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc);
140 NOTICE("BL31: Non secure code at 0x%lx\n", bl33_image_ep_info.pc);
141}
142
Shubhrajyoti Dattaabf61222021-03-17 23:01:17 +0530143static interrupt_type_handler_t type_el3_interrupt_handler;
144
Venkatesh Yadav Abbarapubde87592022-05-24 11:11:12 +0530145int32_t request_intr_type_el3(uint32_t id, interrupt_type_handler_t handler)
Shubhrajyoti Dattaabf61222021-03-17 23:01:17 +0530146{
147 /* Validate 'handler'*/
Abhyuday Godhasarabacbdee2021-08-20 00:27:03 -0700148 if (handler == NULL) {
Shubhrajyoti Dattaabf61222021-03-17 23:01:17 +0530149 return -EINVAL;
150 }
151
152 type_el3_interrupt_handler = handler;
153
154 return 0;
155}
156
157static uint64_t rdo_el3_interrupt_handler(uint32_t id, uint32_t flags,
158 void *handle, void *cookie)
159{
160 uint32_t intr_id;
161 interrupt_type_handler_t handler;
162
163 intr_id = plat_ic_get_pending_interrupt_id();
164 /* Currently we support one interrupt */
165 if (intr_id != PLAT_VERSAL_IPI_IRQ) {
166 WARN("Unexpected interrupt call: 0x%x\n", intr_id);
167 return 0;
168 }
169
170 handler = type_el3_interrupt_handler;
Abhyuday Godhasarabacbdee2021-08-20 00:27:03 -0700171 if (handler != NULL) {
Shubhrajyoti Dattaabf61222021-03-17 23:01:17 +0530172 return handler(intr_id, flags, handle, cookie);
173 }
174
175 return 0;
176}
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530177void bl31_platform_setup(void)
178{
179 /* Initialize the gic cpu and distributor interfaces */
180 plat_versal_gic_driver_init();
181 plat_versal_gic_init();
182}
183
184void bl31_plat_runtime_setup(void)
185{
Shubhrajyoti Dattaabf61222021-03-17 23:01:17 +0530186 uint64_t flags = 0;
Abhyuday Godhasara096f5cc2021-08-13 06:45:32 -0700187 int32_t rc;
Shubhrajyoti Dattaabf61222021-03-17 23:01:17 +0530188
189 set_interrupt_rm_flag(flags, NON_SECURE);
190 rc = register_interrupt_type_handler(INTR_TYPE_EL3,
191 rdo_el3_interrupt_handler, flags);
Abhyuday Godhasarabacbdee2021-08-20 00:27:03 -0700192 if (rc != 0) {
Shubhrajyoti Dattaabf61222021-03-17 23:01:17 +0530193 panic();
194 }
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530195}
196
197/*
198 * Perform the very early platform specific architectural setup here.
199 */
200void bl31_plat_arch_setup(void)
201{
Tejas Patel54d13192019-02-27 18:44:55 +0530202 plat_arm_interconnect_init();
203 plat_arm_interconnect_enter_coherency();
204
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530205 const mmap_region_t bl_regions[] = {
206 MAP_REGION_FLAT(BL31_BASE, BL31_END - BL31_BASE,
207 MT_MEMORY | MT_RW | MT_SECURE),
208 MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE,
209 MT_CODE | MT_SECURE),
210 MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_BASE,
211 MT_RO_DATA | MT_SECURE),
212 MAP_REGION_FLAT(BL_COHERENT_RAM_BASE,
213 BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE,
214 MT_DEVICE | MT_RW | MT_SECURE),
215 {0}
216 };
217
218 setup_page_tables(bl_regions, plat_versal_get_mmap());
219 enable_mmu_el3(0);
220}