blob: 1ae85de7c74ae2b72203a8670be87a8bccedae12 [file] [log] [blame]
Pranav Madhu2835ab42020-11-11 10:27:14 +05301# Copyright (c) 2020-2021, ARM Limited and Contributors. All rights reserved.
Aditya Angadie6508952019-07-21 22:13:45 +05302#
3# SPDX-License-Identifier: BSD-3-Clause
4#
5
Aditya Angadied339d82020-12-15 17:10:50 +05306# RD-V1 platform uses GIC-Clayton which is based on GICv4.1
Vijayenthiran Subramaniam1360d7e2020-04-06 17:54:42 +05307GIC_ENABLE_V4_EXTN := 1
8
Aditya Angadie6508952019-07-21 22:13:45 +05309include plat/arm/css/sgi/sgi-common.mk
10
Aditya Angadied339d82020-12-15 17:10:50 +053011RDV1_BASE = plat/arm/board/rdv1
Aditya Angadie6508952019-07-21 22:13:45 +053012
Aditya Angadied339d82020-12-15 17:10:50 +053013PLAT_INCLUDES += -I${RDV1_BASE}/include/
Aditya Angadie6508952019-07-21 22:13:45 +053014
Jimmy Brisson958a0b12020-09-30 15:28:03 -050015SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_v1.S
Aditya Angadie6508952019-07-21 22:13:45 +053016
Aditya Angadi502d0ac2020-11-18 08:27:15 +053017PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/sgi_plat.c
18
Aditya Angadie6508952019-07-21 22:13:45 +053019BL1_SOURCES += ${SGI_CPU_SOURCES} \
Aditya Angadied339d82020-12-15 17:10:50 +053020 ${RDV1_BASE}/rdv1_err.c
Aditya Angadie6508952019-07-21 22:13:45 +053021
Aditya Angadied339d82020-12-15 17:10:50 +053022BL2_SOURCES += ${RDV1_BASE}/rdv1_plat.c \
23 ${RDV1_BASE}/rdv1_security.c \
24 ${RDV1_BASE}/rdv1_err.c \
Aditya Angadie6508952019-07-21 22:13:45 +053025 lib/utils/mem_region.c \
Suyash Pathak30b20142020-02-12 10:08:55 +053026 drivers/arm/tzc/tzc400.c \
27 plat/arm/common/arm_tzc400.c \
Aditya Angadie6508952019-07-21 22:13:45 +053028 plat/arm/common/arm_nor_psci_mem_protect.c
29
30BL31_SOURCES += ${SGI_CPU_SOURCES} \
Aditya Angadied339d82020-12-15 17:10:50 +053031 ${RDV1_BASE}/rdv1_plat.c \
32 ${RDV1_BASE}/rdv1_topology.c \
Aditya Angadie6508952019-07-21 22:13:45 +053033 drivers/cfi/v2m/v2m_flash.c \
34 lib/utils/mem_region.c \
35 plat/arm/common/arm_nor_psci_mem_protect.c
36
Vijayenthiran Subramaniamdae19c32020-07-14 15:22:14 +053037ifeq (${TRUSTED_BOARD_BOOT}, 1)
Aditya Angadied339d82020-12-15 17:10:50 +053038BL1_SOURCES += ${RDV1_BASE}/rdv1_trusted_boot.c
39BL2_SOURCES += ${RDV1_BASE}/rdv1_trusted_boot.c
Vijayenthiran Subramaniamdae19c32020-07-14 15:22:14 +053040endif
41
Aditya Angadie6508952019-07-21 22:13:45 +053042# Add the FDT_SOURCES and options for Dynamic Config
Aditya Angadied339d82020-12-15 17:10:50 +053043FDT_SOURCES += ${RDV1_BASE}/fdts/${PLAT}_fw_config.dts \
44 ${RDV1_BASE}/fdts/${PLAT}_tb_fw_config.dts
Manish V Badarkhe64616a52020-05-31 08:53:40 +010045FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
46TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
Aditya Angadie6508952019-07-21 22:13:45 +053047
Manish V Badarkhe64616a52020-05-31 08:53:40 +010048# Add the FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +010049$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
Aditya Angadie6508952019-07-21 22:13:45 +053050# Add the TB_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +010051$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
Aditya Angadie6508952019-07-21 22:13:45 +053052
Aditya Angadied339d82020-12-15 17:10:50 +053053FDT_SOURCES += ${RDV1_BASE}/fdts/${PLAT}_nt_fw_config.dts
Aditya Angadie6508952019-07-21 22:13:45 +053054NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
55
56# Add the NT_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +010057$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG}))
Aditya Angadie6508952019-07-21 22:13:45 +053058
59override CTX_INCLUDE_AARCH32_REGS := 0
Pranav Madhu2835ab42020-11-11 10:27:14 +053060override ENABLE_AMU := 1
Aditya Angadi06402222021-03-20 12:06:15 +053061
62ifneq ($(CSS_SGI_PLATFORM_VARIANT),0)
63 $(error "CSS_SGI_PLATFORM_VARIANT for RD-V1 should always be 0, \
64 currently set to ${CSS_SGI_PLATFORM_VARIANT}.")
65endif