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Konstantin Porotchkinee4fa952018-10-08 16:50:54 +03001/*
2 * Copyright (C) 2016 Marvell International Ltd.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 * https://spdx.org/licenses
6 */
7
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00008#ifndef A3700_CONSOLE_H
9#define A3700_CONSOLE_H
Konstantin Porotchkinee4fa952018-10-08 16:50:54 +030010
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000011#include <drivers/console.h>
Konstantin Porotchkind8e39572018-11-14 17:15:08 +020012
Konstantin Porotchkinee4fa952018-10-08 16:50:54 +030013/* MVEBU UART Registers */
14#define UART_RX_REG 0x00
15#define UART_TX_REG 0x04
16#define UART_CTRL_REG 0x08
17#define UART_STATUS_REG 0x0c
18#define UART_BAUD_REG 0x10
19#define UART_POSSR_REG 0x14
20
21/* FIFO Control Register bits */
22#define UARTFCR_FIFOMD_16450 (0 << 6)
23#define UARTFCR_FIFOMD_16550 (1 << 6)
24#define UARTFCR_RXTRIG_1 (0 << 6)
25#define UARTFCR_RXTRIG_4 (1 << 6)
26#define UARTFCR_RXTRIG_8 (2 << 6)
27#define UARTFCR_RXTRIG_16 (3 << 6)
28#define UARTFCR_TXTRIG_1 (0 << 4)
29#define UARTFCR_TXTRIG_4 (1 << 4)
30#define UARTFCR_TXTRIG_8 (2 << 4)
31#define UARTFCR_TXTRIG_16 (3 << 4)
32#define UARTFCR_DMAEN (1 << 3) /* Enable DMA mode */
33#define UARTFCR_TXCLR (1 << 2) /* Clear contents of Tx FIFO */
34#define UARTFCR_RXCLR (1 << 1) /* Clear contents of Rx FIFO */
35#define UARTFCR_FIFOEN (1 << 0) /* Enable the Tx/Rx FIFO */
36
37/* Line Control Register bits */
38#define UARTLCR_DLAB (1 << 7) /* Divisor Latch Access */
39#define UARTLCR_SETB (1 << 6) /* Set BREAK Condition */
40#define UARTLCR_SETP (1 << 5) /* Set Parity to LCR[4] */
41#define UARTLCR_EVEN (1 << 4) /* Even Parity Format */
42#define UARTLCR_PAR (1 << 3) /* Parity */
43#define UARTLCR_STOP (1 << 2) /* Stop Bit */
44#define UARTLCR_WORDSZ_5 0 /* Word Length of 5 */
45#define UARTLCR_WORDSZ_6 1 /* Word Length of 6 */
46#define UARTLCR_WORDSZ_7 2 /* Word Length of 7 */
47#define UARTLCR_WORDSZ_8 3 /* Word Length of 8 */
48
49/* Line Status Register bits */
50#define UARTLSR_TXFIFOFULL (1 << 11) /* Tx Fifo Full */
51
52/* UART Control Register bits */
53#define UART_CTRL_RXFIFO_RESET (1 << 14)
54#define UART_CTRL_TXFIFO_RESET (1 << 15)
55#define UARTLSR_TXFIFOEMPTY (1 << 6)
56
Konstantin Porotchkind8e39572018-11-14 17:15:08 +020057#define CONSOLE_T_A3700_BASE CONSOLE_T_DRVDATA
58
Julius Werner53456fc2019-07-09 13:49:11 -070059#ifndef __ASSEMBLER__
Konstantin Porotchkind8e39572018-11-14 17:15:08 +020060
61#include <stdint.h>
62
63typedef struct {
64 console_t console;
65 uintptr_t base;
66} console_a3700_t;
67
68/*
69 * Initialize a new a3700 console instance and register it with the console
70 * framework. The |console| pointer must point to storage that will be valid
71 * for the lifetime of the console, such as a global or static local variable.
72 * Its contents will be reinitialized from scratch.
73 */
74int console_a3700_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
75 console_a3700_t *console);
76
Julius Werner53456fc2019-07-09 13:49:11 -070077#endif /*__ASSEMBLER__*/
Konstantin Porotchkind8e39572018-11-14 17:15:08 +020078
79#endif /* A3700_CONSOLE_H */