blob: 78db1605a9fe6ce82206a127c9c5422f3bc7fdad [file] [log] [blame]
Dan Handley9df48042015-03-19 18:58:55 +00001/*
2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arm_def.h>
32#include <bl_common.h>
33#include <console.h>
34#include <platform_def.h>
35#include <platform_tsp.h>
36#include <plat_arm.h>
37
38
39/*
40 * The next 3 constants identify the extents of the code & RO data region and
41 * the limit of the BL3-2 image. These addresses are used by the MMU setup code
42 * and therefore they must be page-aligned. It is the responsibility of the
43 * linker script to ensure that __RO_START__, __RO_END__ & & __BL32_END__
44 * linker symbols refer to page-aligned addresses.
45 */
46#define BL32_RO_BASE (unsigned long)(&__RO_START__)
47#define BL32_RO_LIMIT (unsigned long)(&__RO_END__)
48#define BL32_END (unsigned long)(&__BL32_END__)
49
50#if USE_COHERENT_MEM
51/*
52 * The next 2 constants identify the extents of the coherent memory region.
53 * These addresses are used by the MMU setup code and therefore they must be
54 * page-aligned. It is the responsibility of the linker script to ensure that
55 * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
56 * page-aligned addresses.
57 */
58#define BL32_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
59#define BL32_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
60#endif
61
62
63/* Weak definitions may be overridden in specific ARM standard platform */
64#pragma weak tsp_early_platform_setup
65#pragma weak tsp_platform_setup
66#pragma weak tsp_plat_arch_setup
67
68
69/*******************************************************************************
70 * Initialize the UART
71 ******************************************************************************/
72void arm_tsp_early_platform_setup(void)
73{
74 /*
75 * Initialize a different console than already in use to display
76 * messages from TSP
77 */
78 console_init(PLAT_ARM_TSP_UART_BASE, PLAT_ARM_TSP_UART_CLK_IN_HZ,
79 ARM_CONSOLE_BAUDRATE);
80}
81
82void tsp_early_platform_setup(void)
83{
84 arm_tsp_early_platform_setup();
85}
86
87/*******************************************************************************
88 * Perform platform specific setup placeholder
89 ******************************************************************************/
90void tsp_platform_setup(void)
91{
92 plat_arm_gic_init();
93}
94
95/*******************************************************************************
96 * Perform the very early platform specific architectural setup here. At the
97 * moment this is only intializes the MMU
98 ******************************************************************************/
99void tsp_plat_arch_setup(void)
100{
101 arm_configure_mmu_el1(BL32_RO_BASE,
102 (BL32_END - BL32_RO_BASE),
103 BL32_RO_BASE,
104 BL32_RO_LIMIT
105#if USE_COHERENT_MEM
106 , BL32_COHERENT_RAM_BASE,
107 BL32_COHERENT_RAM_LIMIT
108#endif
109 );
110}