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Vijayenthiran Subramaniam03bb12f2018-10-22 18:36:35 +05301/*
Alexei Fedorov69f93c82020-07-27 15:04:14 +01002 * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
Vijayenthiran Subramaniam03bb12f2018-10-22 18:36:35 +05303 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef TZC_DMC620_H
8#define TZC_DMC620_H
9
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010#include <lib/utils_def.h>
Vijayenthiran Subramaniam03bb12f2018-10-22 18:36:35 +053011
12/* DMC-620 memc register offsets */
13#define DMC620_MEMC_STATUS U(0x0000)
14#define DMC620_MEMC_CMD U(0x0008)
15
16/* Mask value to check the status of memc_cmd register */
17#define DMC620_MEMC_CMD_MASK U(0x00000007)
18
19/* memc_cmd register's action values */
20#define DMC620_MEMC_CMD_GO U(0x00000003)
21#define DMC620_MEMC_CMD_EXECUTE U(0x00000004)
22
23/* Address offsets of access address next region 0 registers */
24#define DMC620_ACC_ADDR_MIN_31_00_NEXT_BASE U(0x0080)
25#define DMC620_ACC_ADDR_MIN_47_32_NEXT_BASE U(0x0084)
26#define DMC620_ACC_ADDR_MAX_31_00_NEXT_BASE U(0x0088)
27#define DMC620_ACC_ADDR_MAX_47_32_NEXT_BASE U(0x008c)
28
29/* Length of one block of access address next register region */
30#define DMC620_ACC_ADDR_NEXT_SIZE U(0x0010)
31
32/* Address offsets of access address next registers */
33#define DMC620_ACC_ADDR_MIN_31_00_NEXT(region_no) \
34 (DMC620_ACC_ADDR_MIN_31_00_NEXT_BASE + \
Alexei Fedorov69f93c82020-07-27 15:04:14 +010035 ((region_no) * DMC620_ACC_ADDR_NEXT_SIZE))
Vijayenthiran Subramaniam03bb12f2018-10-22 18:36:35 +053036#define DMC620_ACC_ADDR_MIN_47_32_NEXT(region_no) \
37 (DMC620_ACC_ADDR_MIN_47_32_NEXT_BASE + \
Alexei Fedorov69f93c82020-07-27 15:04:14 +010038 ((region_no) * DMC620_ACC_ADDR_NEXT_SIZE))
Vijayenthiran Subramaniam03bb12f2018-10-22 18:36:35 +053039#define DMC620_ACC_ADDR_MAX_31_00_NEXT(region_no) \
40 (DMC620_ACC_ADDR_MAX_31_00_NEXT_BASE + \
Alexei Fedorov69f93c82020-07-27 15:04:14 +010041 ((region_no) * DMC620_ACC_ADDR_NEXT_SIZE))
Vijayenthiran Subramaniam03bb12f2018-10-22 18:36:35 +053042#define DMC620_ACC_ADDR_MAX_47_32_NEXT(region_no) \
43 (DMC620_ACC_ADDR_MAX_47_32_NEXT_BASE + \
Alexei Fedorov69f93c82020-07-27 15:04:14 +010044 ((region_no) * DMC620_ACC_ADDR_NEXT_SIZE))
Vijayenthiran Subramaniam03bb12f2018-10-22 18:36:35 +053045
46/* Number of TZC address regions in DMC-620 */
47#define DMC620_ACC_ADDR_COUNT U(8)
48/* Width of access address registers */
49#define DMC620_ACC_ADDR_WIDTH U(32)
50
51/* Peripheral ID registers offsets */
52#define DMC620_PERIPHERAL_ID_0 U(0x1fe0)
53
54/* Default values in id registers */
55#define DMC620_PERIPHERAL_ID_0_VALUE U(0x00000054)
56
57/* Secure access region attributes. */
58#define TZC_DMC620_REGION_NS_RD U(0x00000001)
59#define TZC_DMC620_REGION_NS_WR U(0x00000002)
60#define TZC_DMC620_REGION_NS_RDWR \
61 (TZC_DMC620_REGION_NS_RD | TZC_DMC620_REGION_NS_WR)
62#define TZC_DMC620_REGION_S_RD U(0x00000004)
63#define TZC_DMC620_REGION_S_WR U(0x00000008)
64#define TZC_DMC620_REGION_S_RDWR \
65 (TZC_DMC620_REGION_S_RD | TZC_DMC620_REGION_S_WR)
66#define TZC_DMC620_REGION_S_NS_RDWR \
67 (TZC_DMC620_REGION_NS_RDWR | TZC_DMC620_REGION_S_RDWR)
68
69/*
70 * Contains pointer to the base addresses of all the DMC-620 instances.
71 * 'dmc_count' specifies the number of DMC base addresses contained in the
72 * array pointed to by dmc_base.
73 */
74typedef struct tzc_dmc620_driver_data {
75 const uintptr_t *dmc_base;
76 const unsigned int dmc_count;
77} tzc_dmc620_driver_data_t;
78
79/*
80 * Contains region base, region top addresses and corresponding attributes
81 * for configuring TZC access region registers.
82 */
83typedef struct tzc_dmc620_acc_addr_data {
84 const unsigned long long region_base;
85 const unsigned long long region_top;
86 const unsigned int sec_attr;
87} tzc_dmc620_acc_addr_data_t;
88
89/*
90 * Contains platform specific data for configuring TZC region base and
91 * region top address. 'acc_addr_count' specifies the number of
92 * valid entries in 'plat_acc_addr_data' array.
93 */
94typedef struct tzc_dmc620_config_data {
95 const tzc_dmc620_driver_data_t *plat_drv_data;
96 const tzc_dmc620_acc_addr_data_t *plat_acc_addr_data;
97 const uint8_t acc_addr_count;
98} tzc_dmc620_config_data_t;
99
100/* Function prototypes */
101void arm_tzc_dmc620_setup(const tzc_dmc620_config_data_t *plat_config_data);
102
103#endif /* TZC_DMC620_H */
104