blob: 2430c47ce4bca6f9e7611365281f98fd2674a5e6 [file] [log] [blame]
developer550bf5e2016-07-11 16:05:23 +08001/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <stdint.h>
32#include <arch_helpers.h>
33#include <mmio.h>
34#include <mt_cpuxgpt.h>
35#include <stdint.h>
36#include <platform.h>
37#include <debug.h>
38#define CPUXGPT_BASE 0x10200000
39#define INDEX_BASE (CPUXGPT_BASE+0x0674)
40#define CTL_BASE (CPUXGPT_BASE+0x0670)
41
42uint64_t normal_time_base;
43uint64_t atf_time_base;
44
45void sched_clock_init(uint64_t normal_base, uint64_t atf_base)
46{
47 normal_time_base = normal_base;
48 atf_time_base = atf_base;
49}
50
51uint64_t sched_clock(void)
52{
53 uint64_t cval;
54
55 cval = (((read_cntpct_el0() - atf_time_base)*1000)/
56 SYS_COUNTER_FREQ_IN_MHZ) + normal_time_base;
57 return cval;
58}
59
60/*
61 * Return: 0 - Trying to disable the CPUXGPT control bit,
62 * and not allowed to disable it.
63 * Return: 1 - reg_addr is not realted to disable the control bit.
64 */
65unsigned char check_cpuxgpt_write_permission(unsigned int reg_addr,
66 unsigned int reg_value)
67{
68 unsigned int idx;
69 unsigned int ctl_val;
70
71 if (reg_addr == CTL_BASE) {
72 idx = mmio_read_32(INDEX_BASE);
73
74 /* idx 0: CPUXGPT system control */
75 if (idx == 0) {
76 ctl_val = mmio_read_32(CTL_BASE);
77 if (ctl_val & 1) {
78 /*
79 * if enable bit already set,
80 * then bit 0 is not allow to set as 0
81 */
82 if (!(reg_value & 1))
83 return 0;
84 }
85 }
86 }
87 return 1;
88}
89