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Manish V Badarkhe51a97112021-07-08 09:33:18 +01001/*
Jayanth Dodderi Chidanand118b3352024-06-18 15:22:54 +01002 * Copyright (c) 2021-2024, Arm Limited. All rights reserved.
Manish V Badarkhe51a97112021-07-08 09:33:18 +01003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Manish V Badarkhe51a97112021-07-08 09:33:18 +01007#include <arch.h>
Andre Przywara06ea44e2022-11-17 17:30:43 +00008#include <arch_features.h>
Manish V Badarkhe51a97112021-07-08 09:33:18 +01009#include <arch_helpers.h>
10#include <lib/extensions/trf.h>
11
Jayanth Dodderi Chidanand118b3352024-06-18 15:22:54 +010012void trf_enable(cpu_context_t *ctx)
Manish V Badarkhe51a97112021-07-08 09:33:18 +010013{
Jayanth Dodderi Chidanand118b3352024-06-18 15:22:54 +010014 el3_state_t *state = get_el3state_ctx(ctx);
15 u_register_t mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3);
Manish V Badarkhe51a97112021-07-08 09:33:18 +010016
Andre Przywara06ea44e2022-11-17 17:30:43 +000017 /*
Boyan Karatotev6e2fd8b2023-02-13 16:38:37 +000018 * MDCR_EL3.STE = b0
19 * Trace prohibited in Secure state unless overridden by the
20 * IMPLEMENTATION DEFINED authentication interface.
21 *
Andre Przywara06ea44e2022-11-17 17:30:43 +000022 * MDCR_EL3.TTRF = b0
23 * Allow access of trace filter control registers from NS-EL2
24 * and NS-EL1 when NS-EL2 is implemented but not used
25 */
Jayanth Dodderi Chidanand118b3352024-06-18 15:22:54 +010026 mdcr_el3_val &= ~(MDCR_STE_BIT | MDCR_TTRF_BIT);
27 write_ctx_reg(state, CTX_MDCR_EL3, mdcr_el3_val);
Manish V Badarkhe51a97112021-07-08 09:33:18 +010028}
Boyan Karatotev6468d4a2023-02-16 15:12:45 +000029
30void trf_init_el2_unused(void)
31{
32 /*
33 * MDCR_EL2.TTRF: Set to zero so that access to Trace
34 * Filter Control register TRFCR_EL1 at EL1 is not
35 * trapped to EL2. This bit is RES0 in versions of
36 * the architecture earlier than ARMv8.4.
37 *
38 */
39 write_mdcr_el2(read_mdcr_el2() & ~MDCR_EL2_TTRF);
40}