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Soren Brinkmann76fcae32016-03-06 20:16:27 -08001/*
Antonio Nino Diazea3c4de2018-10-17 16:46:41 +01002 * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
Soren Brinkmann76fcae32016-03-06 20:16:27 -08003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Soren Brinkmann76fcae32016-03-06 20:16:27 -08005 */
6
Jolly Shah0bfd7002019-01-08 11:10:47 -08007#ifndef PLAT_PRIVATE_H
8#define PLAT_PRIVATE_H
Soren Brinkmann76fcae32016-03-06 20:16:27 -08009
Antonio Nino Diazea3c4de2018-10-17 16:46:41 +010010#include <stdint.h>
Soren Brinkmann76fcae32016-03-06 20:16:27 -080011
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000012#include <bl31/interrupt_mgmt.h>
13#include <common/bl_common.h>
14
Soren Brinkmann76fcae32016-03-06 20:16:27 -080015void zynqmp_config_setup(void);
16
Antonio Nino Diazea3c4de2018-10-17 16:46:41 +010017unsigned int zynqmp_calc_core_pos(u_register_t mpidr);
18
Soren Brinkmann76fcae32016-03-06 20:16:27 -080019/* ZynqMP specific functions */
20unsigned int zynqmp_get_uart_clk(void);
Soren Brinkmannb43d9432016-04-18 11:49:42 -070021unsigned int zynqmp_get_bootmode(void);
Soren Brinkmann76fcae32016-03-06 20:16:27 -080022
Michal Simekef8f5592015-06-15 14:22:50 +020023/* For FSBL handover */
Siva Durga Prasad Paladugu8f499722018-05-17 15:17:46 +053024enum fsbl_handoff {
25 FSBL_HANDOFF_SUCCESS = 0,
26 FSBL_HANDOFF_NO_STRUCT,
27 FSBL_HANDOFF_INVAL_STRUCT,
28 FSBL_HANDOFF_TOO_MANY_PARTS,
29};
30
Siva Durga Prasad Paladuguefd431b2018-04-30 20:12:12 +053031#if ZYNQMP_WDT_RESTART
32/*
33 * Register handler to specific GIC entrance
34 * for INTR_TYPE_EL3 type of interrupt
35 */
36int request_intr_type_el3(uint32_t, interrupt_type_handler_t);
37#endif
38
Siva Durga Prasad Paladugu8f499722018-05-17 15:17:46 +053039enum fsbl_handoff fsbl_atf_handover(entry_point_info_t *bl32_image_ep_info,
Michal Simekef8f5592015-06-15 14:22:50 +020040 entry_point_info_t *bl33_image_ep_info);
41
Jolly Shah0bfd7002019-01-08 11:10:47 -080042#endif /* PLAT_PRIVATE_H */