| developer | 1d69df5 | 2022-09-05 17:36:36 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2022, MediaTek Inc. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef MT_SMP_H |
| 8 | #define MT_SMP_H |
| 9 | |
| 10 | #include <lib/mmio.h> |
| 11 | #include <platform_def.h> |
| 12 | |
| 13 | #define CPU_PWR_STATUS (MCUCFG_BASE + 0xA840) |
| 14 | |
| 15 | #define SMP_CORE_TIMEOUT_MAX (50000) |
| 16 | #define DO_SMP_CORE_ON_WAIT_TIMEOUT(k_cnt) ({ \ |
| 17 | CPU_PM_ASSERT(k_cnt < SMP_CORE_TIMEOUT_MAX); \ |
| 18 | k_cnt++; udelay(1); }) |
| 19 | |
| 20 | void mt_smp_core_init_arch(unsigned int cluster, unsigned int cpu, int arm64, |
| 21 | struct cpu_pwr_ctrl *pwr_ctrl); |
| 22 | void mt_smp_core_bootup_address_set(struct cpu_pwr_ctrl *pwr_ctrl, uintptr_t entry); |
| 23 | int mt_smp_power_core_on(unsigned int cpu_id, struct cpu_pwr_ctrl *pwr_ctrl); |
| 24 | int mt_smp_power_core_off(struct cpu_pwr_ctrl *pwr_ctrl); |
| 25 | void mt_smp_init(void); |
| 26 | |
| 27 | #endif /* MT_SMP_H */ |