| Soren Brinkmann | f9a3119 | 2016-03-06 20:14:51 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #ifndef __CADENCE_UART_H__ |
| 32 | #define __CADENCE_UART_H__ |
| 33 | |
| 34 | /* This is very minimalistic and will only work in QEMU. */ |
| 35 | |
| 36 | /* CADENCE Registers */ |
| 37 | #define R_UART_CR 0 |
| 38 | #define R_UART_CR_RXRST (1 << 0) /* RX logic reset */ |
| 39 | #define R_UART_CR_TXRST (1 << 1) /* TX logic reset */ |
| 40 | #define R_UART_CR_RX_EN (1 << 2) /* RX enabled */ |
| 41 | #define R_UART_CR_TX_EN (1 << 4) /* TX enabled */ |
| 42 | |
| 43 | #define R_UART_SR 0x2C |
| 44 | #define UART_SR_INTR_REMPTY_BIT 1 |
| 45 | #define UART_SR_INTR_TFUL_BIT 4 |
| 46 | |
| 47 | #define R_UART_TX 0x30 |
| 48 | #define R_UART_RX 0x30 |
| 49 | |
| 50 | #endif |