Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 1 | /* |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 2 | * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #ifndef __TZC400_H__ |
| 32 | #define __TZC400_H__ |
| 33 | |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 34 | #include <tzc_common.h> |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 35 | |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 36 | #define BUILD_CONFIG_OFF 0x000 |
| 37 | #define GATE_KEEPER_OFF 0x008 |
| 38 | #define SPECULATION_CTRL_OFF 0x00c |
| 39 | #define INT_STATUS 0x010 |
| 40 | #define INT_CLEAR 0x014 |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 41 | |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 42 | #define FAIL_ADDRESS_LOW_OFF 0x020 |
| 43 | #define FAIL_ADDRESS_HIGH_OFF 0x024 |
| 44 | #define FAIL_CONTROL_OFF 0x028 |
| 45 | #define FAIL_ID 0x02c |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 46 | |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 47 | /* ID registers not common across different varieties of TZC */ |
| 48 | #define PID5 0xFD4 |
| 49 | #define PID6 0xFD8 |
| 50 | #define PID7 0xFDC |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 51 | |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 52 | #define BUILD_CONFIG_NF_SHIFT 24 |
| 53 | #define BUILD_CONFIG_NF_MASK 0x3 |
| 54 | #define BUILD_CONFIG_AW_SHIFT 8 |
| 55 | #define BUILD_CONFIG_AW_MASK 0x3f |
| 56 | #define BUILD_CONFIG_NR_SHIFT 0 |
| 57 | #define BUILD_CONFIG_NR_MASK 0x1f |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 58 | |
| 59 | /* |
| 60 | * Number of gate keepers is implementation defined. But we know the max for |
| 61 | * this device is 4. Get implementation details from BUILD_CONFIG. |
| 62 | */ |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 63 | #define GATE_KEEPER_OS_SHIFT 16 |
| 64 | #define GATE_KEEPER_OS_MASK 0xf |
| 65 | #define GATE_KEEPER_OR_SHIFT 0 |
| 66 | #define GATE_KEEPER_OR_MASK 0xf |
| 67 | #define GATE_KEEPER_FILTER_MASK 0x1 |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 68 | |
| 69 | /* Speculation is enabled by default. */ |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 70 | #define SPECULATION_CTRL_WRITE_DISABLE (1 << 1) |
| 71 | #define SPECULATION_CTRL_READ_DISABLE (1 << 0) |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 72 | |
| 73 | /* Max number of filters allowed is 4. */ |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 74 | #define INT_STATUS_OVERLAP_SHIFT 16 |
| 75 | #define INT_STATUS_OVERLAP_MASK 0xf |
| 76 | #define INT_STATUS_OVERRUN_SHIFT 8 |
| 77 | #define INT_STATUS_OVERRUN_MASK 0xf |
| 78 | #define INT_STATUS_STATUS_SHIFT 0 |
| 79 | #define INT_STATUS_STATUS_MASK 0xf |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 80 | |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 81 | #define INT_CLEAR_CLEAR_SHIFT 0 |
| 82 | #define INT_CLEAR_CLEAR_MASK 0xf |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 83 | |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 84 | #define FAIL_CONTROL_DIR_SHIFT (1 << 24) |
| 85 | #define FAIL_CONTROL_DIR_READ 0x0 |
| 86 | #define FAIL_CONTROL_DIR_WRITE 0x1 |
| 87 | #define FAIL_CONTROL_NS_SHIFT (1 << 21) |
| 88 | #define FAIL_CONTROL_NS_SECURE 0x0 |
| 89 | #define FAIL_CONTROL_NS_NONSECURE 0x1 |
| 90 | #define FAIL_CONTROL_PRIV_SHIFT (1 << 20) |
| 91 | #define FAIL_CONTROL_PRIV_PRIV 0x0 |
| 92 | #define FAIL_CONTROL_PRIV_UNPRIV 0x1 |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 93 | |
| 94 | /* |
| 95 | * FAIL_ID_ID_MASK depends on AID_WIDTH which is platform specific. |
| 96 | * Platform should provide the value on initialisation. |
| 97 | */ |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 98 | #define FAIL_ID_VNET_SHIFT 24 |
| 99 | #define FAIL_ID_VNET_MASK 0xf |
| 100 | #define FAIL_ID_ID_SHIFT 0 |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 101 | |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 102 | #define TZC_400_PERIPHERAL_ID 0x460 |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 103 | |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 104 | /* Filter enable bits in a TZC */ |
| 105 | #define TZC_400_REGION_ATTR_F_EN_MASK 0xf |
| 106 | #define TZC_400_REGION_ATTR_FILTER_BIT(x) ((1 << x) \ |
| 107 | << TZC_REGION_ATTR_F_EN_SHIFT) |
| 108 | #define TZC_400_REGION_ATTR_FILTER_BIT_ALL \ |
| 109 | (TZC_400_REGION_ATTR_F_EN_MASK << \ |
| 110 | TZC_REGION_ATTR_F_EN_SHIFT) |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 111 | |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 112 | /* |
| 113 | * Define some macros for backward compatibility with existing tzc400 clients. |
| 114 | */ |
| 115 | #if !ERROR_DEPRECATED |
| 116 | #define REG_ATTR_FILTER_BIT(x) ((1 << x) \ |
| 117 | << TZC_REGION_ATTR_F_EN_SHIFT) |
| 118 | #define REG_ATTR_FILTER_BIT_ALL (TZC_400_REGION_ATTR_F_EN_MASK << \ |
| 119 | TZC_REGION_ATTR_F_EN_SHIFT) |
| 120 | #endif /* __ERROR_DEPRECATED__ */ |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 121 | |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 122 | /* |
| 123 | * All TZC region configuration registers are placed one after another. It |
| 124 | * depicts size of block of registers for programming each region. |
| 125 | */ |
| 126 | #define TZC_400_REGION_SIZE 0x20 |
| 127 | #define TZC_400_ACTION_OFF 0x4 |
Dan Handley | 7607676 | 2015-03-19 19:26:52 +0000 | [diff] [blame] | 128 | |
| 129 | #ifndef __ASSEMBLY__ |
| 130 | |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 131 | #include <cdefs.h> |
Dan Handley | 7607676 | 2015-03-19 19:26:52 +0000 | [diff] [blame] | 132 | #include <stdint.h> |
| 133 | |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 134 | /******************************************************************************* |
| 135 | * Function & variable prototypes |
| 136 | ******************************************************************************/ |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 137 | void tzc400_init(uintptr_t base); |
| 138 | void tzc400_configure_region0(tzc_region_attributes_t sec_attr, |
| 139 | unsigned int ns_device_access); |
| 140 | void tzc400_configure_region(unsigned int filters, |
| 141 | int region, |
Yatharth Kochar | fc71975 | 2016-04-08 14:40:44 +0100 | [diff] [blame] | 142 | unsigned long long region_base, |
| 143 | unsigned long long region_top, |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 144 | tzc_region_attributes_t sec_attr, |
| 145 | unsigned int ns_device_access); |
| 146 | void tzc400_set_action(tzc_action_t action); |
| 147 | void tzc400_enable_filters(void); |
| 148 | void tzc400_disable_filters(void); |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 149 | |
| 150 | /* |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 151 | * Deprecated APIs |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 152 | */ |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 153 | static inline void tzc_init(uintptr_t base) __deprecated; |
| 154 | static inline void tzc_configure_region0( |
| 155 | tzc_region_attributes_t sec_attr, |
| 156 | unsigned int ns_device_access) __deprecated; |
| 157 | static inline void tzc_configure_region( |
| 158 | unsigned int filters, |
| 159 | int region, |
Yatharth Kochar | fc71975 | 2016-04-08 14:40:44 +0100 | [diff] [blame] | 160 | unsigned long long region_base, |
| 161 | unsigned long long region_top, |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 162 | tzc_region_attributes_t sec_attr, |
| 163 | unsigned int ns_device_access) __deprecated; |
| 164 | static inline void tzc_set_action(tzc_action_t action) __deprecated; |
| 165 | static inline void tzc_enable_filters(void) __deprecated; |
| 166 | static inline void tzc_disable_filters(void) __deprecated; |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 167 | |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 168 | static inline void tzc_init(uintptr_t base) |
| 169 | { |
| 170 | tzc400_init(base); |
| 171 | } |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 172 | |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 173 | static inline void tzc_configure_region0( |
Dan Handley | 53c843a | 2014-08-04 19:53:05 +0100 | [diff] [blame] | 174 | tzc_region_attributes_t sec_attr, |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 175 | unsigned int ns_device_access) |
| 176 | { |
| 177 | tzc400_configure_region0(sec_attr, ns_device_access); |
| 178 | } |
| 179 | |
| 180 | static inline void tzc_configure_region( |
| 181 | unsigned int filters, |
| 182 | int region, |
Yatharth Kochar | fc71975 | 2016-04-08 14:40:44 +0100 | [diff] [blame] | 183 | unsigned long long region_base, |
| 184 | unsigned long long region_top, |
Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 185 | tzc_region_attributes_t sec_attr, |
| 186 | unsigned int ns_device_access) |
| 187 | { |
| 188 | tzc400_configure_region(filters, region, region_base, |
| 189 | region_top, sec_attr, ns_device_access); |
| 190 | } |
| 191 | |
| 192 | static inline void tzc_set_action(tzc_action_t action) |
| 193 | { |
| 194 | tzc400_set_action(action); |
| 195 | } |
| 196 | |
| 197 | |
| 198 | static inline void tzc_enable_filters(void) |
| 199 | { |
| 200 | tzc400_enable_filters(); |
| 201 | } |
| 202 | |
| 203 | static inline void tzc_disable_filters(void) |
| 204 | { |
| 205 | tzc400_disable_filters(); |
| 206 | } |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 207 | |
Dan Handley | 7607676 | 2015-03-19 19:26:52 +0000 | [diff] [blame] | 208 | #endif /* __ASSEMBLY__ */ |
Harry Liebel | afd1ec7 | 2014-04-01 19:19:22 +0100 | [diff] [blame] | 209 | |
| 210 | #endif /* __TZC400__ */ |