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Soby Mathewd0194872016-04-29 19:01:30 +01001/*
2 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef __SMCC_HELPERS_H__
32#define __SMCC_HELPERS_H__
33
34#include <smcc.h>
35
36#ifndef __ASSEMBLY__
37#include <context.h>
38
39/* Convenience macros to return from SMC handler */
40#define SMC_RET0(_h) { \
41 return (uint64_t) (_h); \
42}
43#define SMC_RET1(_h, _x0) { \
44 write_ctx_reg(get_gpregs_ctx(_h), CTX_GPREG_X0, (_x0)); \
45 SMC_RET0(_h); \
46}
47#define SMC_RET2(_h, _x0, _x1) { \
48 write_ctx_reg(get_gpregs_ctx(_h), CTX_GPREG_X1, (_x1)); \
49 SMC_RET1(_h, (_x0)); \
50}
51#define SMC_RET3(_h, _x0, _x1, _x2) { \
52 write_ctx_reg(get_gpregs_ctx(_h), CTX_GPREG_X2, (_x2)); \
53 SMC_RET2(_h, (_x0), (_x1)); \
54}
55#define SMC_RET4(_h, _x0, _x1, _x2, _x3) { \
56 write_ctx_reg(get_gpregs_ctx(_h), CTX_GPREG_X3, (_x3)); \
57 SMC_RET3(_h, (_x0), (_x1), (_x2)); \
58}
59
60/*
61 * Convenience macros to access general purpose registers using handle provided
62 * to SMC handler. These take the offset values defined in context.h
63 */
64#define SMC_GET_GP(_h, _g) \
65 read_ctx_reg(get_gpregs_ctx(_h), (_g))
66#define SMC_SET_GP(_h, _g, _v) \
67 write_ctx_reg(get_gpregs_ctx(_h), (_g), (_v))
68
69/*
70 * Convenience macros to access EL3 context registers using handle provided to
71 * SMC handler. These take the offset values defined in context.h
72 */
73#define SMC_GET_EL3(_h, _e) \
74 read_ctx_reg(get_el3state_ctx(_h), (_e))
75#define SMC_SET_EL3(_h, _e, _v) \
76 write_ctx_reg(get_el3state_ctx(_h), (_e), (_v))
77
78/* Return a UUID in the SMC return registers */
79#define SMC_UUID_RET(_h, _uuid) \
80 SMC_RET4(handle, ((const uint32_t *) &(_uuid))[0], \
81 ((const uint32_t *) &(_uuid))[1], \
82 ((const uint32_t *) &(_uuid))[2], \
83 ((const uint32_t *) &(_uuid))[3])
84
85#endif /*__ASSEMBLY__*/
86#endif /* __SMCC_HELPERS_H__ */