Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 1 | /* |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 2 | * Copyright (c) 2017-2022, STMicroelectronics - All Rights Reserved |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef BSEC_H |
| 8 | #define BSEC_H |
| 9 | |
| 10 | #include <stdbool.h> |
| 11 | #include <stdint.h> |
| 12 | |
| 13 | #include <lib/utils_def.h> |
| 14 | |
| 15 | /* |
| 16 | * IP configuration |
| 17 | */ |
| 18 | #define BSEC_OTP_MASK GENMASK(4, 0) |
| 19 | #define BSEC_OTP_BANK_SHIFT 5 |
| 20 | #define BSEC_TIMEOUT_VALUE 0xFFFF |
| 21 | |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 22 | /* |
| 23 | * Return status |
| 24 | */ |
| 25 | #define BSEC_OK 0U |
| 26 | #define BSEC_ERROR 0xFFFFFFFFU |
| 27 | #define BSEC_DISTURBED 0xFFFFFFFEU |
| 28 | #define BSEC_INVALID_PARAM 0xFFFFFFFCU |
| 29 | #define BSEC_PROG_FAIL 0xFFFFFFFBU |
| 30 | #define BSEC_LOCK_FAIL 0xFFFFFFFAU |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 31 | #define BSEC_TIMEOUT 0xFFFFFFF9U |
| 32 | #define BSEC_RETRY 0xFFFFFFF8U |
| 33 | #define BSEC_NOT_SUPPORTED 0xFFFFFFF7U |
| 34 | #define BSEC_WRITE_LOCKED 0xFFFFFFF6U |
| 35 | #define BSEC_ERROR_INVALID_FVR 0xFFFFFFF5U |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 36 | |
| 37 | /* |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 38 | * OTP MODE |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 39 | */ |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 40 | #define BSEC_MODE_OPEN1 0x00U |
| 41 | #define BSEC_MODE_SECURED 0x01U |
| 42 | #define BSEC_MODE_OPEN2 0x02U |
| 43 | #define BSEC_MODE_INVALID 0x04U |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 44 | |
| 45 | /* |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 46 | * OTP Lock services definition. |
| 47 | * Value must corresponding to the bit number in the register. |
| 48 | * Special case: (bit number << 1) for BSEC3. |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 49 | */ |
| 50 | #define BSEC_LOCK_UPPER_OTP 0x00 |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 51 | #define BSEC_LOCK_GWLOCK 0x01 |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 52 | #define BSEC_LOCK_DEBUG 0x02 |
| 53 | #define BSEC_LOCK_PROGRAM 0x03 |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 54 | #define BSEC_LOCK_KVLOCK 0x04 |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 55 | |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 56 | /* |
| 57 | * Values for struct bsec_config::freq |
| 58 | */ |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 59 | #define FREQ_10_20_MHZ 0x0 |
| 60 | #define FREQ_20_30_MHZ 0x1 |
| 61 | #define FREQ_30_45_MHZ 0x2 |
| 62 | #define FREQ_45_67_MHZ 0x3 |
| 63 | |
| 64 | /* |
| 65 | * Device info structure, providing device-specific functions and a means of |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 66 | * adding driver-specific state. |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 67 | */ |
| 68 | struct bsec_config { |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 69 | uint8_t den_lock; /* |
| 70 | * Debug enable sticky lock |
| 71 | * 1 debug enable is locked until next reset |
| 72 | */ |
| 73 | |
| 74 | /* BSEC2 only */ |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 75 | uint8_t tread; /* SAFMEM Reading current level default 0 */ |
| 76 | uint8_t pulse_width; /* SAFMEM Programming pulse width default 1 */ |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 77 | uint8_t freq; /* |
| 78 | * SAFMEM CLOCK see freq value define |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 79 | * default FREQ_45_67_MHZ |
| 80 | */ |
| 81 | uint8_t power; /* Power up SAFMEM. 1 power up, 0 power off */ |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 82 | uint8_t prog_lock; /* |
| 83 | * Programming Sticky lock |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 84 | * 1 programming is locked until next reset |
| 85 | */ |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 86 | uint8_t upper_otp_lock; /* |
| 87 | * Shadowing of upper OTP sticky lock |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 88 | * 1 shadowing of upper OTP is locked |
| 89 | * until next reset |
| 90 | */ |
| 91 | }; |
| 92 | |
| 93 | uint32_t bsec_probe(void); |
| 94 | uint32_t bsec_get_base(void); |
| 95 | |
| 96 | uint32_t bsec_set_config(struct bsec_config *cfg); |
| 97 | uint32_t bsec_get_config(struct bsec_config *cfg); |
| 98 | |
| 99 | uint32_t bsec_shadow_register(uint32_t otp); |
| 100 | uint32_t bsec_read_otp(uint32_t *val, uint32_t otp); |
| 101 | uint32_t bsec_write_otp(uint32_t val, uint32_t otp); |
| 102 | uint32_t bsec_program_otp(uint32_t val, uint32_t otp); |
| 103 | uint32_t bsec_permanent_lock_otp(uint32_t otp); |
| 104 | |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 105 | void bsec_write_debug_conf(uint32_t val); |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 106 | uint32_t bsec_read_debug_conf(void); |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 107 | |
| 108 | void bsec_write_scratch(uint32_t val); |
| 109 | uint32_t bsec_read_scratch(void); |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 110 | |
| 111 | uint32_t bsec_get_status(void); |
| 112 | uint32_t bsec_get_hw_conf(void); |
| 113 | uint32_t bsec_get_version(void); |
| 114 | uint32_t bsec_get_id(void); |
| 115 | uint32_t bsec_get_magic_id(void); |
| 116 | |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 117 | uint32_t bsec_set_sr_lock(uint32_t otp); |
| 118 | uint32_t bsec_read_sr_lock(uint32_t otp, bool *value); |
| 119 | uint32_t bsec_set_sw_lock(uint32_t otp); |
| 120 | uint32_t bsec_read_sw_lock(uint32_t otp, bool *value); |
| 121 | uint32_t bsec_set_sp_lock(uint32_t otp); |
| 122 | uint32_t bsec_read_sp_lock(uint32_t otp, bool *value); |
| 123 | uint32_t bsec_read_permanent_lock(uint32_t otp, bool *value); |
| 124 | uint32_t bsec_otp_lock(uint32_t service); |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 125 | |
Yann Gautier | 36a1e4b | 2019-01-17 14:52:47 +0100 | [diff] [blame] | 126 | uint32_t bsec_shadow_read_otp(uint32_t *otp_value, uint32_t word); |
| 127 | uint32_t bsec_check_nsec_access_rights(uint32_t otp); |
| 128 | |
| 129 | #endif /* BSEC_H */ |