| Etienne Carriere | 02a4ba5 | 2020-05-01 10:33:22 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: BSD-3-Clause */ |
| 2 | /* |
| 3 | * Copyright (c) 2015-2019, Arm Limited and Contributors. All rights reserved. |
| 4 | * Copyright (c) 2019, Linaro Limited |
| 5 | */ |
| 6 | #ifndef SCMI_MSG_RESET_DOMAIN_H |
| 7 | #define SCMI_MSG_RESET_DOMAIN_H |
| 8 | |
| 9 | #include <stdbool.h> |
| 10 | #include <stdint.h> |
| 11 | |
| 12 | #include <lib/utils_def.h> |
| 13 | |
| 14 | #define SCMI_PROTOCOL_VERSION_RESET_DOMAIN 0x10000U |
| 15 | |
| 16 | #define SCMI_RESET_STATE_ARCH BIT(31) |
| 17 | #define SCMI_RESET_STATE_IMPL 0U |
| 18 | |
| 19 | /* |
| 20 | * Identifiers of the SCMI Reset Domain Management Protocol commands |
| 21 | */ |
| 22 | enum scmi_reset_domain_command_id { |
| 23 | SCMI_RESET_DOMAIN_ATTRIBUTES = 0x03, |
| 24 | SCMI_RESET_DOMAIN_REQUEST = 0x04, |
| 25 | SCMI_RESET_DOMAIN_NOTIFY = 0x05, |
| 26 | }; |
| 27 | |
| 28 | /* |
| 29 | * Identifiers of the SCMI Reset Domain Management Protocol responses |
| 30 | */ |
| 31 | enum scmi_reset_domain_response_id { |
| 32 | SCMI_RESET_ISSUED = 0x00, |
| 33 | SCMI_RESET_COMPLETE = 0x04, |
| 34 | }; |
| 35 | |
| 36 | /* |
| 37 | * PROTOCOL_ATTRIBUTES |
| 38 | */ |
| 39 | |
| 40 | #define SCMI_RESET_DOMAIN_COUNT_MASK GENMASK_32(15, 0) |
| 41 | |
| 42 | struct scmi_reset_domain_protocol_attributes_p2a { |
| 43 | int32_t status; |
| 44 | uint32_t attributes; |
| 45 | }; |
| 46 | |
| 47 | /* Value for scmi_reset_domain_attributes_p2a:flags */ |
| 48 | #define SCMI_RESET_DOMAIN_ATTR_ASYNC BIT(31) |
| 49 | #define SCMI_RESET_DOMAIN_ATTR_NOTIF BIT(30) |
| 50 | |
| 51 | /* Value for scmi_reset_domain_attributes_p2a:latency */ |
| 52 | #define SCMI_RESET_DOMAIN_ATTR_UNK_LAT 0x7fffffffU |
| 53 | #define SCMI_RESET_DOMAIN_ATTR_MAX_LAT 0x7ffffffeU |
| 54 | |
| 55 | /* Macro for scmi_reset_domain_attributes_p2a:name */ |
| 56 | #define SCMI_RESET_DOMAIN_ATTR_NAME_SZ 16U |
| 57 | |
| 58 | struct scmi_reset_domain_attributes_a2p { |
| 59 | uint32_t domain_id; |
| 60 | }; |
| 61 | |
| 62 | struct scmi_reset_domain_attributes_p2a { |
| 63 | int32_t status; |
| 64 | uint32_t flags; |
| 65 | uint32_t latency; |
| 66 | char name[SCMI_RESET_DOMAIN_ATTR_NAME_SZ]; |
| 67 | }; |
| 68 | |
| 69 | /* |
| 70 | * RESET |
| 71 | */ |
| 72 | |
| 73 | /* Values for scmi_reset_domain_request_a2p:flags */ |
| 74 | #define SCMI_RESET_DOMAIN_ASYNC BIT(2) |
| 75 | #define SCMI_RESET_DOMAIN_EXPLICIT BIT(1) |
| 76 | #define SCMI_RESET_DOMAIN_AUTO BIT(0) |
| 77 | |
| 78 | struct scmi_reset_domain_request_a2p { |
| 79 | uint32_t domain_id; |
| 80 | uint32_t flags; |
| 81 | uint32_t reset_state; |
| 82 | }; |
| 83 | |
| 84 | struct scmi_reset_domain_request_p2a { |
| 85 | int32_t status; |
| 86 | }; |
| 87 | |
| 88 | /* |
| 89 | * RESET_NOTIFY |
| 90 | */ |
| 91 | |
| 92 | /* Values for scmi_reset_notify_p2a:flags */ |
| 93 | #define SCMI_RESET_DOMAIN_DO_NOTIFY BIT(0) |
| 94 | |
| 95 | struct scmi_reset_domain_notify_a2p { |
| 96 | uint32_t domain_id; |
| 97 | uint32_t notify_enable; |
| 98 | }; |
| 99 | |
| 100 | struct scmi_reset_domain_notify_p2a { |
| 101 | int32_t status; |
| 102 | }; |
| 103 | |
| 104 | /* |
| 105 | * RESET_COMPLETE |
| 106 | */ |
| 107 | |
| 108 | struct scmi_reset_domain_complete_p2a { |
| 109 | int32_t status; |
| 110 | uint32_t domain_id; |
| 111 | }; |
| 112 | |
| 113 | /* |
| 114 | * RESET_ISSUED |
| 115 | */ |
| 116 | |
| 117 | struct scmi_reset_domain_issued_p2a { |
| 118 | uint32_t domain_id; |
| 119 | uint32_t reset_state; |
| 120 | }; |
| 121 | |
| 122 | #endif /* SCMI_MSG_RESET_DOMAIN_H */ |