| Samarth Parikh | 59cfa13 | 2017-11-23 14:23:21 +0530 | [diff] [blame] | 1 | /* |
| Aditya Angadi | 7b424ba | 2019-12-31 10:14:32 +0530 | [diff] [blame] | 2 | * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved. |
| Samarth Parikh | 59cfa13 | 2017-11-23 14:23:21 +0530 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef CSS_MHU_DOORBELL_H |
| 8 | #define CSS_MHU_DOORBELL_H |
| 9 | |
| Samarth Parikh | 59cfa13 | 2017-11-23 14:23:21 +0530 | [diff] [blame] | 10 | #include <stdint.h> |
| 11 | |
| Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 12 | #include <lib/mmio.h> |
| 13 | |
| Aditya Angadi | 7b424ba | 2019-12-31 10:14:32 +0530 | [diff] [blame] | 14 | /* MHUv2 Frame Base Mask */ |
| 15 | #define MHU_V2_FRAME_BASE_MASK UL(~0xFFF) |
| Samarth Parikh | 59cfa13 | 2017-11-23 14:23:21 +0530 | [diff] [blame] | 16 | |
| 17 | /* MHUv2 Control Registers Offsets */ |
| Aditya Angadi | 7b424ba | 2019-12-31 10:14:32 +0530 | [diff] [blame] | 18 | #define MHU_V2_MSG_NO_CAP_OFFSET UL(0xF80) |
| 19 | #define MHU_V2_ACCESS_REQ_OFFSET UL(0xF88) |
| 20 | #define MHU_V2_ACCESS_READY_OFFSET UL(0xF8C) |
| Samarth Parikh | 59cfa13 | 2017-11-23 14:23:21 +0530 | [diff] [blame] | 21 | |
| Daniel Boulby | ebdb634 | 2018-05-14 17:18:58 +0100 | [diff] [blame] | 22 | #define SENDER_REG_STAT(_channel) (0x20 * (_channel)) |
| 23 | #define SENDER_REG_SET(_channel) ((0x20 * (_channel)) + 0xC) |
| Samarth Parikh | 59cfa13 | 2017-11-23 14:23:21 +0530 | [diff] [blame] | 24 | |
| 25 | /* Helper macro to ring doorbell */ |
| 26 | #define MHU_RING_DOORBELL(addr, modify_mask, preserve_mask) do { \ |
| 27 | uint32_t db = mmio_read_32(addr) & (preserve_mask); \ |
| 28 | mmio_write_32(addr, db | (modify_mask)); \ |
| 29 | } while (0) |
| 30 | |
| 31 | #define MHU_V2_ACCESS_REQUEST(addr) \ |
| 32 | mmio_write_32((addr) + MHU_V2_ACCESS_REQ_OFFSET, 0x1) |
| 33 | |
| 34 | #define MHU_V2_CLEAR_REQUEST(addr) \ |
| 35 | mmio_write_32((addr) + MHU_V2_ACCESS_REQ_OFFSET, 0x0) |
| 36 | |
| 37 | #define MHU_V2_IS_ACCESS_READY(addr) \ |
| 38 | (mmio_read_32((addr) + MHU_V2_ACCESS_READY_OFFSET) & 0x1) |
| 39 | |
| 40 | struct scmi_channel_plat_info; |
| 41 | void mhu_ring_doorbell(struct scmi_channel_plat_info *plat_info); |
| 42 | void mhuv2_ring_doorbell(struct scmi_channel_plat_info *plat_info); |
| 43 | |
| 44 | #endif /* CSS_MHU_DOORBELL_H */ |