Ghennadi Procopciuc | a9fee05 | 2024-01-30 16:19:47 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2024 NXP |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <common/desc_image_load.h> |
| 8 | #include <lib/mmio.h> |
| 9 | #include <plat/common/platform.h> |
| 10 | #include <plat_console.h> |
| 11 | #include <plat_io_storage.h> |
| 12 | |
| 13 | #define SIUL2_PC09_MSCR UL(0x4009C2E4) |
| 14 | #define SIUL2_PC10_MSCR UL(0x4009C2E8) |
| 15 | #define SIUL2_PC10_LIN0_IMCR UL(0x4009CA40) |
| 16 | |
| 17 | #define LIN0_TX_MSCR_CFG U(0x00214001) |
| 18 | #define LIN0_RX_MSCR_CFG U(0x00094000) |
| 19 | #define LIN0_RX_IMCR_CFG U(0x00000002) |
| 20 | |
| 21 | struct bl_load_info *plat_get_bl_image_load_info(void) |
| 22 | { |
| 23 | return get_bl_load_info_from_mem_params_desc(); |
| 24 | } |
| 25 | |
| 26 | struct bl_params *plat_get_next_bl_params(void) |
| 27 | { |
| 28 | return get_next_bl_params_from_mem_params_desc(); |
| 29 | } |
| 30 | |
| 31 | void plat_flush_next_bl_params(void) |
| 32 | { |
| 33 | flush_bl_params_desc(); |
| 34 | } |
| 35 | |
| 36 | void bl2_platform_setup(void) |
| 37 | { |
| 38 | } |
| 39 | |
| 40 | static void linflex_config_pinctrl(void) |
| 41 | { |
| 42 | /* set PC09 - MSCR[41] - for UART0 TXD */ |
| 43 | mmio_write_32(SIUL2_PC09_MSCR, LIN0_TX_MSCR_CFG); |
| 44 | /* set PC10 - MSCR[42] - for UART0 RXD */ |
| 45 | mmio_write_32(SIUL2_PC10_MSCR, LIN0_RX_MSCR_CFG); |
| 46 | /* set PC10 - MSCR[512]/IMCR[0] - for UART0 RXD */ |
| 47 | mmio_write_32(SIUL2_PC10_LIN0_IMCR, LIN0_RX_IMCR_CFG); |
| 48 | } |
| 49 | |
| 50 | void bl2_el3_early_platform_setup(u_register_t arg0, u_register_t arg1, |
| 51 | u_register_t arg2, u_register_t arg3) |
| 52 | { |
| 53 | linflex_config_pinctrl(); |
| 54 | console_s32g2_register(); |
| 55 | |
| 56 | plat_s32g2_io_setup(); |
| 57 | } |
| 58 | |
| 59 | void bl2_el3_plat_arch_setup(void) |
| 60 | { |
| 61 | } |
| 62 | |